Searched refs:IMX6QDL_CLK_IPU2_DI1_SEL (Results 1 - 3 of 3) sorted by relevance

/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dimx6qdl-clock.h51 #define IMX6QDL_CLK_IPU2_DI1_SEL 42 macro
/linux-master/include/dt-bindings/clock/
H A Dimx6qdl-clock.h51 #define IMX6QDL_CLK_IPU2_DI1_SEL 42 macro
/linux-master/drivers/clk/imx/
H A Dclk-imx6q.c674 hws[IMX6QDL_CLK_IPU2_DI1_SEL] = imx_clk_hw_mux_flags("ipu2_di1_sel", base + 0x38, 9, 3, ipu2_di1_sels_2, ARRAY_SIZE(ipu2_di1_sels_2), CLK_SET_RATE_PARENT);
690 hws[IMX6QDL_CLK_IPU2_DI1_SEL] = imx_clk_hw_mux_flags("ipu2_di1_sel", base + 0x38, 9, 3, ipu2_di1_sels, ARRAY_SIZE(ipu2_di1_sels), CLK_SET_RATE_PARENT);
939 clk_set_parent(hws[IMX6QDL_CLK_IPU2_DI1_SEL]->clk, hws[IMX6QDL_CLK_IPU2_DI1_PRE]->clk);

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