Searched refs:IMX6QDL_CLK_IPU1_DI1_PRE_SEL (Results 1 - 3 of 3) sorted by relevance

/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dimx6qdl-clock.h45 #define IMX6QDL_CLK_IPU1_DI1_PRE_SEL 36 macro
/linux-master/include/dt-bindings/clock/
H A Dimx6qdl-clock.h45 #define IMX6QDL_CLK_IPU1_DI1_PRE_SEL 36 macro
/linux-master/drivers/clk/imx/
H A Dclk-imx6q.c664 hws[IMX6QDL_CLK_IPU1_DI1_PRE_SEL] = imx_clk_hw_mux_flags("ipu1_di1_pre_sel", base + 0x34, 15, 3, ipu_di_pre_sels, ARRAY_SIZE(ipu_di_pre_sels), CLK_SET_RATE_PARENT);
933 clk_set_parent(hws[IMX6QDL_CLK_IPU1_DI1_PRE_SEL]->clk, hws[IMX6QDL_CLK_PLL5_VIDEO_DIV]->clk);

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