Searched refs:IMX6QDL_CLK_IPU1_DI0_SEL (Results 1 - 3 of 3) sorted by relevance

/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dimx6qdl-clock.h48 #define IMX6QDL_CLK_IPU1_DI0_SEL 39 macro
/linux-master/include/dt-bindings/clock/
H A Dimx6qdl-clock.h48 #define IMX6QDL_CLK_IPU1_DI0_SEL 39 macro
/linux-master/drivers/clk/imx/
H A Dclk-imx6q.c671 hws[IMX6QDL_CLK_IPU1_DI0_SEL] = imx_clk_hw_mux_flags("ipu1_di0_sel", base + 0x34, 0, 3, ipu1_di0_sels_2, ARRAY_SIZE(ipu1_di0_sels_2), CLK_SET_RATE_PARENT);
687 hws[IMX6QDL_CLK_IPU1_DI0_SEL] = imx_clk_hw_mux_flags("ipu1_di0_sel", base + 0x34, 0, 3, ipu1_di0_sels, ARRAY_SIZE(ipu1_di0_sels), CLK_SET_RATE_PARENT);
936 clk_set_parent(hws[IMX6QDL_CLK_IPU1_DI0_SEL]->clk, hws[IMX6QDL_CLK_IPU1_DI0_PRE]->clk);

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