Searched refs:CSR20 (Results 1 - 7 of 7) sorted by relevance

/linux-master/drivers/net/ethernet/amd/
H A Dariadne.h80 #define CSR20 0x1400 /* Current Transmit Buffer Address */ macro
/linux-master/drivers/net/ethernet/dec/tulip/
H A Dtulip.h124 CSR20 = 0x90, enumerator in enum:tulip_offsets
H A Dtulip_core.c1854 tmp = ioread32(ioaddr + CSR20);
1856 iowrite32(tmp, ioaddr + CSR20);
/linux-master/drivers/net/wireless/ralink/rt2x00/
H A Drt2400pci.c520 reg = rt2x00mmio_register_read(rt2x00dev, CSR20);
528 rt2x00mmio_register_write(rt2x00dev, CSR20, reg);
531 rt2x00mmio_register_write(rt2x00dev, CSR20, reg);
533 reg = rt2x00mmio_register_read(rt2x00dev, CSR20);
535 rt2x00mmio_register_write(rt2x00dev, CSR20, reg);
H A Drt2500pci.c568 reg = rt2x00mmio_register_read(rt2x00dev, CSR20);
576 rt2x00mmio_register_write(rt2x00dev, CSR20, reg);
579 rt2x00mmio_register_write(rt2x00dev, CSR20, reg);
581 reg = rt2x00mmio_register_read(rt2x00dev, CSR20);
583 rt2x00mmio_register_write(rt2x00dev, CSR20, reg);
H A Drt2400pci.h250 * CSR20: Wakeup timer register.
255 #define CSR20 0x0050 macro
H A Drt2500pci.h327 * CSR20: Wakeup timer register.
332 #define CSR20 0x0050 macro

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