| /linux-master/drivers/net/ethernet/dec/tulip/ |
| H A D | pnic2.c | 31 * Bit 9 - Full Duplex mode (Advertise 10BaseT-FD is CSR14<7> is set)
65 * CSR14<7> CSR6<18> CSR6<22> CSR6<23> CSR6<24> MODE/PORT
108 csr14 = (ioread32(ioaddr + CSR14) & 0xfff0ee39);
153 iowrite32(csr14, ioaddr + CSR14);
182 csr12, csr5, ioread32(ioaddr + CSR14));
241 csr14 = (ioread32(ioaddr + CSR14) & 0xffffff7f);
242 iowrite32(csr14,ioaddr + CSR14);
290 csr14 = (ioread32(ioaddr + CSR14) & 0xffffff7f);
291 iowrite32(csr14,ioaddr + CSR14);
392 csr14 = (ioread32(ioaddr + CSR14)
[all...] |
| H A D | 21142.c | 37 int csr14 = ioread32(ioaddr + CSR14);
80 iowrite32(0x0003FFFF, ioaddr + CSR14);
88 iowrite32(0x0003FFFF, ioaddr + CSR14);
126 iowrite32(csr14, ioaddr + CSR14);
144 int csr14 = ioread32(ioaddr + CSR14);
234 iowrite32(csr14 & ~0x080, ioaddr + CSR14);
251 iowrite32(0x0003FF7F, ioaddr + CSR14);
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| H A D | tulip_core.c | 331 iowrite32(addr_low, ioaddr + CSR14);
333 iowrite32(addr_high, ioaddr + CSR14);
411 iowrite32(0x0000, ioaddr + CSR14);
427 iowrite32(0x0000, ioaddr + CSR14);
545 ioread32(ioaddr + CSR13), ioread32(ioaddr + CSR14),
921 int csr14 = ioread32 (ioaddr + CSR14);
1103 iowrite32(mc_filter[0], ioaddr + CSR14);
1105 iowrite32(mc_filter[1], ioaddr + CSR14);
1732 iowrite32(0x0000, ioaddr + CSR14);
1740 iowrite32(0x0000, ioaddr + CSR14);
[all...] |
| H A D | timer.c | 32 ioread32(ioaddr + CSR14), ioread32(ioaddr + CSR15));
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| H A D | media.c | 217 iowrite32(csr14val, ioaddr + CSR14);
230 iowrite32(csr14val, ioaddr + CSR14);
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| H A D | tulip.h | 120 CSR14 = 0x70, enumerator in enum:tulip_offsets
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| H A D | de2104x.c | 151 CSR14 = 0x70, enumerator in enum:__anon740
926 dw32(CSR14, de->media[media].csr14);
943 dr32(CSR13), dr32(CSR14), dr32(CSR15));
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| H A D | xircom_cb.c | 62 #define CSR14 0x70 macro
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| /linux-master/drivers/net/wireless/ralink/rt2x00/ |
| H A D | rt2400pci.c | 297 reg = rt2x00mmio_register_read(rt2x00dev, CSR14);
299 rt2x00mmio_register_write(rt2x00dev, CSR14, reg);
639 reg = rt2x00mmio_register_read(rt2x00dev, CSR14);
643 rt2x00mmio_register_write(rt2x00dev, CSR14, reg);
695 reg = rt2x00mmio_register_read(rt2x00dev, CSR14);
699 rt2x00mmio_register_write(rt2x00dev, CSR14, reg);
830 reg = rt2x00mmio_register_read(rt2x00dev, CSR14);
839 rt2x00mmio_register_write(rt2x00dev, CSR14, reg);
1175 reg = rt2x00mmio_register_read(rt2x00dev, CSR14);
1177 rt2x00mmio_register_write(rt2x00dev, CSR14, re
[all...] |
| H A D | rt2500pci.c | 303 reg = rt2x00mmio_register_read(rt2x00dev, CSR14);
305 rt2x00mmio_register_write(rt2x00dev, CSR14, reg);
728 reg = rt2x00mmio_register_read(rt2x00dev, CSR14);
732 rt2x00mmio_register_write(rt2x00dev, CSR14, reg);
784 reg = rt2x00mmio_register_read(rt2x00dev, CSR14);
788 rt2x00mmio_register_write(rt2x00dev, CSR14, reg);
922 reg = rt2x00mmio_register_read(rt2x00dev, CSR14);
931 rt2x00mmio_register_write(rt2x00dev, CSR14, reg);
1327 reg = rt2x00mmio_register_read(rt2x00dev, CSR14);
1329 rt2x00mmio_register_write(rt2x00dev, CSR14, re
[all...] |
| H A D | rt2400pci.h | 188 * CSR14: Synchronization control register.
198 #define CSR14 0x0038 macro
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| H A D | rt2500pci.h | 265 * CSR14: Synchronization control register.
275 #define CSR14 0x0038 macro
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| /linux-master/drivers/net/ethernet/amd/ |
| H A D | ariadne.h | 74 #define CSR14 0x0e00 /* - Physical Address Register, PADR[47:32] */ macro
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| H A D | ariadne.c | 447 lance->RAP = CSR14; /* Physical Address Register, PADR[47:32] */
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