Searched refs:CLK_TOP_PMICSPI_SEL (Results 1 - 25 of 25) sorted by relevance

/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmt8135-clk.h96 #define CLK_TOP_PMICSPI_SEL 85 macro
H A Dmt7629-clk.h101 #define CLK_TOP_PMICSPI_SEL 91 macro
H A Dmt8516-clk.h166 #define CLK_TOP_PMICSPI_SEL 134 macro
H A Dmt7622-clk.h86 #define CLK_TOP_PMICSPI_SEL 74 macro
H A Dmt8173-clk.h112 #define CLK_TOP_PMICSPI_SEL 102 macro
H A Dmediatek,mt6795-clk.h110 #define CLK_TOP_PMICSPI_SEL 99 macro
H A Dmt2701-clk.h106 #define CLK_TOP_PMICSPI_SEL 95 macro
H A Dmt2712-clk.h149 #define CLK_TOP_PMICSPI_SEL 118 macro
/linux-master/include/dt-bindings/clock/
H A Dmt8135-clk.h96 #define CLK_TOP_PMICSPI_SEL 85 macro
H A Dmt7629-clk.h101 #define CLK_TOP_PMICSPI_SEL 91 macro
H A Dmt8516-clk.h166 #define CLK_TOP_PMICSPI_SEL 134 macro
H A Dmt7622-clk.h86 #define CLK_TOP_PMICSPI_SEL 74 macro
H A Dmt8173-clk.h112 #define CLK_TOP_PMICSPI_SEL 102 macro
H A Dmediatek,mt6795-clk.h110 #define CLK_TOP_PMICSPI_SEL 99 macro
H A Dmt2701-clk.h106 #define CLK_TOP_PMICSPI_SEL 95 macro
H A Dmt2712-clk.h149 #define CLK_TOP_PMICSPI_SEL 118 macro
/linux-master/drivers/clk/mediatek/
H A Dclk-mt6795-topckgen.c482 TOP_MUX_GATE(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents, 0x90, 0, 3, 5, 0),
H A Dclk-mt8173-topckgen.c566 MUX_GATE(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents,
H A Dclk-mt8135.c387 MUX_GATE(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents, 0x0164, 0, 3, 7),
H A Dclk-mt7622.c430 MUX_GATE(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents,
H A Dclk-mt8167.c546 MUX(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents,
H A Dclk-mt8516.c375 MUX(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents,
H A Dclk-mt7629.c502 MUX_GATE(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents,
H A Dclk-mt2712.c677 MUX_GATE(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents, 0x090, 0, 3, 7),
H A Dclk-mt2701.c523 MUX_GATE(CLK_TOP_PMICSPI_SEL, "pmicspi_sel", pmicspi_parents,

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