Searched refs:CLK_TOP_MSDCPLL2 (Results 1 - 9 of 9) sorted by relevance

/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmt8173-clk.h50 #define CLK_TOP_MSDCPLL2 40 macro
H A Dmediatek,mt6795-clk.h48 #define CLK_TOP_MSDCPLL2 37 macro
H A Dmt2712-clk.h113 #define CLK_TOP_MSDCPLL2 82 macro
/linux-master/include/dt-bindings/clock/
H A Dmt8173-clk.h50 #define CLK_TOP_MSDCPLL2 40 macro
H A Dmediatek,mt6795-clk.h48 #define CLK_TOP_MSDCPLL2 37 macro
H A Dmt2712-clk.h113 #define CLK_TOP_MSDCPLL2 82 macro
/linux-master/drivers/clk/mediatek/
H A Dclk-mt6795-topckgen.c401 FACTOR(CLK_TOP_MSDCPLL2, "msdcpll2_ck", "msdcpll2", 1, 1),
H A Dclk-mt8173-topckgen.c480 FACTOR(CLK_TOP_MSDCPLL2, "msdcpll2_ck", "msdcpll2", 1, 1),
H A Dclk-mt2712.c120 FACTOR(CLK_TOP_MSDCPLL2, "msdcpll2_ck", "msdcpll2", 1, 1),

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