Searched refs:CLK_TOP_GCPU_SEL (Results 1 - 9 of 9) sorted by relevance
| /linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/ |
| H A D | mt8135-clk.h | 99 #define CLK_TOP_GCPU_SEL 88 macro
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| H A D | mt2712-clk.h | 197 #define CLK_TOP_GCPU_SEL 166 macro
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| H A D | mediatek,mt8365-clk.h | 110 #define CLK_TOP_GCPU_SEL 100 macro
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| /linux-master/include/dt-bindings/clock/ |
| H A D | mt8135-clk.h | 99 #define CLK_TOP_GCPU_SEL 88 macro
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| H A D | mt2712-clk.h | 197 #define CLK_TOP_GCPU_SEL 166 macro
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| H A D | mediatek,mt8365-clk.h | 110 #define CLK_TOP_GCPU_SEL 100 macro
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| /linux-master/drivers/clk/mediatek/ |
| H A D | clk-mt8135.c | 391 MUX_GATE(CLK_TOP_GCPU_SEL, "gcpu_sel", gcpu_parents, 0x0164, 24, 3, 31),
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| H A D | clk-mt2712.c | 749 MUX_GATE(CLK_TOP_GCPU_SEL, "gcpu_sel", gcpu_parents, 0x570, 0, 3, 7),
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| H A D | clk-mt8365.c | 517 MUX_GATE_CLR_SET_UPD(CLK_TOP_GCPU_SEL, "gcpu_sel", gcpu_parents, 0x0e0,
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