Searched refs:CLK_TOP_DI_SEL (Results 1 - 6 of 6) sorted by relevance

/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dmt2701-clk.h115 #define CLK_TOP_DI_SEL 104 macro
H A Dmt2712-clk.h191 #define CLK_TOP_DI_SEL 160 macro
/linux-master/include/dt-bindings/clock/
H A Dmt2701-clk.h115 #define CLK_TOP_DI_SEL 104 macro
H A Dmt2712-clk.h191 #define CLK_TOP_DI_SEL 160 macro
/linux-master/drivers/clk/mediatek/
H A Dclk-mt2712.c740 MUX_GATE(CLK_TOP_DI_SEL, "di_sel", di_parents, 0x550, 16, 3, 23),
H A Dclk-mt2701.c548 MUX_GATE(CLK_TOP_DI_SEL, "di_sel", di_parents,

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