Searched refs:AR_PHY_PLL_CTL (Results 1 - 6 of 6) sorted by relevance
| /haiku-fatelf/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5211/ |
| H A D | ar5211phy.h | 44 #define AR_PHY_PLL_CTL 0x987c /* PLL control register */ macro
|
| H A D | ar5211_attach.c | 245 OS_REG_WRITE(ah, AR_PHY_PLL_CTL, AR_PHY_PLL_CTL_44);
|
| H A D | ar5211_reset.c | 606 OS_REG_WRITE(ah, AR_PHY_PLL_CTL, AR_PHY_PLL_CTL_44);
610 OS_REG_WRITE(ah, AR_PHY_PLL_CTL, AR_PHY_PLL_CTL_40);
|
| /haiku-fatelf/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5312/ |
| H A D | ar5312_reset.c | 699 curPhyPLL = OS_REG_READ(ah, AR_PHY_PLL_CTL);
711 OS_REG_WRITE(ah, AR_PHY_PLL_CTL, phyPLL);
717 OS_REG_WRITE(ah, AR_PHY_PLL_CTL, phyPLL);
|
| /haiku-fatelf/src/add-ons/kernel/drivers/network/wlan/atheroswifi/dev/ath/ath_hal/ar5212/ |
| H A D | ar5212phy.h | 140 #define AR_PHY_PLL_CTL 0x987c /* PLL control register */ macro
|
| H A D | ar5212_reset.c | 921 curPhyPLL = OS_REG_READ(ah, AR_PHY_PLL_CTL);
933 OS_REG_WRITE(ah, AR_PHY_PLL_CTL, phyPLL);
939 OS_REG_WRITE(ah, AR_PHY_PLL_CTL, phyPLL);
|
Completed in 102 milliseconds