Searched refs:instr (Results 1 - 25 of 25) sorted by relevance

/haiku-buildtools/binutils/gas/testsuite/gas/aarch64/
H A Dneon-vfp-reglist-post.s16 .irp instr ld,st
18 ldst1_reg_list_post_imm_64 \instr \bits_64
29 .irp instr ld,st
31 ldst1_reg_list_post_imm_128 \instr \bits_128
42 .irp instr ld,st
44 ldst1_reg_list_post_reg \instr \bits x7
62 .irp instr ld,st
64 ldst2_reg_list_post_imm_reg_64 \instr \bits_64 x7
68 .irp instr ld,st
70 ldst2_reg_list_post_imm_reg_128 \instr \bits_12
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H A Dillegal.s260 .irp instr ld,st
262 ldst2_reg_list_post_imm_reg_64 \instr \bits_64 x7
266 .irp instr ld,st
268 ldst2_reg_list_post_imm_reg_128 \instr \bits_128 x7
286 .irp instr ld,st
288 ldst34_reg_list_post_imm_reg_64 \instr \bits_64 x7
292 .irp instr ld,st
294 ldst34_reg_list_post_imm_reg_128 \instr \bits_128 x7
315 .irp instr, ld, st
316 ldstn_index_rep_H_altreg_imm \instr inde
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/haiku-buildtools/binutils/opcodes/
H A Dmicroblaze-dis.c32 #define get_field_rd(instr) get_field (instr, RD_MASK, RD_LOW)
33 #define get_field_r1(instr) get_field (instr, RA_MASK, RA_LOW)
34 #define get_field_r2(instr) get_field (instr, RB_MASK, RB_LOW)
35 #define get_int_field_imm(instr) ((instr & IMM_MASK) >> IMM_LOW)
36 #define get_int_field_r1(instr) ((instr
41 get_field(long instr, long mask, unsigned short low) argument
50 get_field_imm(long instr) argument
59 get_field_imm5(long instr) argument
68 get_field_imm5_mbar(long instr) argument
77 get_field_rfsl(long instr) argument
87 get_field_imm15(long instr) argument
96 get_field_special(long instr, struct op_code_struct * op) argument
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H A Dm88k-dis.c31 const INSTAB *instr; member in struct:HASHTAB
548 hashentries[i].instr = &instructions[i];
727 (entry_ptr != NULL) && (entry_ptr->instr->opcode != opcode);
735 (*info->fprintf_func) (info->stream, "%s", entry_ptr->instr->mnemonic);
736 printop (info, &(entry_ptr->instr->op1), instruction, pc, 1);
737 printop (info, &(entry_ptr->instr->op2), instruction, pc, 0);
738 printop (info, &(entry_ptr->instr->op3), instruction, pc, 0);
H A Dmicroblaze-opc.h111 short delay_slots; /* Info about delay slots needed after this instr. */
117 enum microblaze_instr instr; member in struct:op_code_struct
/haiku-buildtools/legacy/binutils/gas/config/
H A Dtc-i960.c545 emit (long instr) /* Word to be output, host byte order. */
550 md_number_to_chars (toP, instr, 4); /* Convert to target byte order. */
569 long instr, /* Instruction needing the displacement. */
594 md_number_to_chars (outP, instr, 4);
602 outP = emit (instr);
1073 memS instr; /* Description of binary to be output. */
1084 memset (&instr, '\0', sizeof (memS));
1085 instr.opcode = oP->opcode;
1093 parse_memop (&instr, args[i], oP->format);
1097 instr
544 emit(long instr) argument
566 get_cdisp(char *dispP, char *ifmtP, long instr, int numbits, int var_frag, int callj) argument
1072 memS instr; /* Description of binary to be output. */ local
1315 long instr; /* Binary to be output. */ local
1539 long instr; /* 32-bit instruction. */ local
1790 long instr; /* 32-bit instruction to be fixed-up. */ local
1995 long instr; /* A single i960 instruction. */ local
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H A Dtc-maxq.c132 unsigned char instr[2]; member in struct:_maxq20_insn
351 unsigned long instr; local
357 instr = 0;
361 instr = fragP->fr_address + fragP->fr_fix - 2;
367 diff = (call_addr - instr) - 1;
2470 i.instr[0] = i.op.format << 7;
2478 i.instr[0] = i.op.format << 7;
2497 i.instr[0] |= i.op.dst[0];
2507 i.instr[0] |= 0x4D;
2510 i.instr[
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H A Dbfin-parse.y367 INSTR_T instr;
496 %type <instr> asm
510 %type <instr> asm_1
/haiku-buildtools/binutils/gas/config/
H A Dtc-i960.c540 emit (long instr) /* Word to be output, host byte order. */
545 md_number_to_chars (toP, instr, 4); /* Convert to target byte order. */
564 long instr, /* Instruction needing the displacement. */
590 md_number_to_chars (outP, instr, 4);
598 outP = emit (instr);
1069 memS instr; /* Description of binary to be output. */
1080 memset (&instr, '\0', sizeof (memS));
1081 instr.opcode = oP->opcode;
1089 parse_memop (&instr, args[i], oP->format);
1093 instr
539 emit(long instr) argument
561 get_cdisp(const char *dispP, const char *ifmtP, long instr, int numbits, int var_frag, int callj) argument
1068 memS instr; /* Description of binary to be output. */ local
1311 long instr; /* Binary to be output. */ local
1535 long instr; /* 32-bit instruction. */ local
1730 long instr; /* 32-bit instruction to be fixed-up. */ local
1935 long instr; /* A single i960 instruction. */ local
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H A Dtc-tilegx.c800 const struct tilegx_instruction *instr = &current_bundle[j]; local
803 ((BFD_HOST_U_64_BIT)1) << instr->opcode->implicitly_written_register;
806 for (k = 0; k < instr->opcode->num_operands; k++)
809 &tilegx_operands[instr->opcode->operands[instr->pipe][k]];
813 int regno = instr->operand_values[k].X_add_number;
986 struct tilegx_instruction *instr = &current_bundle[j]; local
987 tilegx_pipeline pipeline = instr->pipe;
988 const struct tilegx_opcode *opcode = instr->opcode;
993 instr
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H A Dtc-tilepro.c691 const struct tilepro_instruction *instr = &current_bundle[j]; local
694 ((BFD_HOST_U_64_BIT)1) << instr->opcode->implicitly_written_register;
697 for (k = 0; k < instr->opcode->num_operands; k++)
700 &tilepro_operands[instr->opcode->operands[instr->pipe][k]];
704 int regno = instr->operand_values[k].X_add_number;
876 struct tilepro_instruction *instr = &current_bundle[j]; local
877 tilepro_pipeline pipeline = instr->pipe;
878 const struct tilepro_opcode *opcode = instr->opcode;
883 instr
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H A Dtc-aarch64.c4400 find_best_match (const aarch64_inst *instr,
4405 num_opnds = aarch64_num_of_operands (instr->opcode);
4429 if (*qualifiers == instr->operands[j].qualifier)
4447 assign_qualifier_sequence (aarch64_inst *instr,
4451 int num_opnds = aarch64_num_of_operands (instr->opcode);
4454 instr->operands[i].qualifier = *qualifiers;
6408 programmer_friendly_fixup (aarch64_instruction *instr)
6410 aarch64_inst *base = &instr->base;
6443 if (instr->gen_lit_pool
6449 if (instr
4394 find_best_match(const aarch64_inst *instr, const aarch64_opnd_qualifier_seq_t *qualifiers_list) argument
4441 assign_qualifier_sequence(aarch64_inst *instr, const aarch64_opnd_qualifier_t *qualifiers) argument
6401 programmer_friendly_fixup(aarch64_instruction *instr) argument
6506 warn_unpredictable_ldst(aarch64_instruction *instr, char *str) argument
6553 do_encode(const aarch64_opcode *opcode, aarch64_inst *instr, aarch64_insn *code) argument
7137 try_to_encode_as_unscaled_ldst(aarch64_inst *instr) argument
7199 fix_mov_imm_insn(fixS *fixP, char *buf, aarch64_inst *instr, offsetT value) argument
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H A Dbfin-parse.y445 INSTR_T instr;
574 %type <instr> asm
588 %type <instr> asm_1
/haiku-buildtools/legacy/gcc/gcc/config/1750a/
H A D1750a.c196 mod_regno_adjust (instr, op)
197 char *instr;
201 char *r = (!strncmp (instr, "dvr", 3) ? "r" : "");
208 sprintf (outstr, "%s r%%0,%s%%2", instr, r);
211 modregno_gcc, modregno_1750, instr, r, modregno_1750,
/haiku-buildtools/legacy/gcc/gcc/config/arm/
H A Darm.c4391 print_multi_reg (stream, instr, mask, hat)
4393 char *instr;
4400 fprintf (stream, instr, REGISTER_PREFIX);
4948 char *instr = instr1;
4956 output_asm_insn (instr, operands);
4957 instr = instr2;
5298 char instr[100];
5344 strcpy (instr,
5347 strcpy (instr,
5355 strcat (instr, "
4941 char *instr = instr1; local
5290 char instr[100]; local
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/haiku-buildtools/legacy/binutils/opcodes/
H A Dm88k-dis.c32 const INSTAB *instr; member in struct:HASHTAB
549 hashentries[i].instr = &instructions[i];
728 (entry_ptr != NULL) && (entry_ptr->instr->opcode != opcode);
736 (*info->fprintf_func) (info->stream, "%s", entry_ptr->instr->mnemonic);
737 printop (info, &(entry_ptr->instr->op1), instruction, pc, 1);
738 printop (info, &(entry_ptr->instr->op2), instruction, pc, 0);
739 printop (info, &(entry_ptr->instr->op3), instruction, pc, 0);
/haiku-buildtools/legacy/binutils/gas/
H A Dbfin-parse.h386 INSTR_T instr; member in union:YYSTYPE
H A Dbfin-parse.c778 INSTR_T instr; member in union:YYSTYPE
2740 insn = (yyvsp[0].instr);
2753 if (((yyvsp[-5].instr)->value & 0xf800) == 0xc000)
2755 if (is_group1 ((yyvsp[-3].instr)) && is_group2 ((yyvsp[-1].instr)))
2756 (yyval.instr) = bfin_gen_multi_instr ((yyvsp[-5].instr), (yyvsp[-3].instr), (yyvsp[-1].instr));
2757 else if (is_group2 ((yyvsp[-3].instr))
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/haiku-buildtools/gcc/gcc/testsuite/g++.dg/torture/
H A Dpr41775.C241 LiveIndex getInstructionIndex (const MachineInstr * instr) const
/haiku-buildtools/binutils/gas/
H A Dbfin-parse.h401 INSTR_T instr; member in union:YYSTYPE
H A Dbfin-parse.c877 INSTR_T instr; member in union:YYSTYPE
2694 insn = (yyvsp[0].instr);
2708 if (((yyvsp[-5].instr)->value & 0xf800) == 0xc000)
2710 if (is_group1 ((yyvsp[-3].instr)) && is_group2 ((yyvsp[-1].instr)))
2711 (yyval.instr) = gen_multi_instr_1 ((yyvsp[-5].instr), (yyvsp[-3].instr), (yyvsp[-1].instr));
2712 else if (is_group2 ((yyvsp[-3].instr))
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/haiku-buildtools/binutils/gas/testsuite/gas/ia64/
H A Ddv-raw-err.l94 .*:215: Warning: Use of 'mov' violates RAW dependency 'CR\[IVA\]' \(instr\)
164 .*:319: Warning: Use of 'epc' violates RAW dependency 'ITC' \(instr\)
166 .*:328: Warning: Use of 'epc' violates RAW dependency 'ITC' \(instr\)
168 .*:328: Warning: Use of 'epc' violates RAW dependency 'ITR' \(instr\)
/haiku-buildtools/legacy/binutils/gas/testsuite/gas/ia64/
H A Ddv-raw-err.l88 .*:201: Warning: Use of 'mov' .* RAW dependency 'CR\[IVA\]' \(instr\)
158 .*:305: Warning: Use of 'epc' .* RAW dependency 'ITC' \(instr\)
160 .*:314: Warning: Use of 'epc' .* RAW dependency 'ITC' \(instr\)
162 .*:314: Warning: Use of 'epc' .* RAW dependency 'ITR' \(instr\)
/haiku-buildtools/binutils/bfd/
H A Delf32-microblaze.c1627 unsigned long instr = bfd_get_32 (abfd, bfd_addr);
1628 instr &= ~0x0000ffff;
1629 instr |= (val & 0x0000ffff);
1630 bfd_put_32 (abfd, instr, bfd_addr);
1781 /* If this is a PC-relative reloc, subtract the instr offset from
2007 unsigned long instr = bfd_get_32 (abfd, ocontents + irelscan->r_offset);
2008 immediate = instr & 0x0000ffff;
1623 unsigned long instr = bfd_get_32 (abfd, bfd_addr); local
2003 unsigned long instr = bfd_get_32 (abfd, ocontents + irelscan->r_offset); local
/haiku-buildtools/gcc/gcc/config/arm/
H A Darm.c18910 const char * instr = instr1;
18918 output_asm_insn (instr, operands);
18919 instr = instr2;
19491 char instr[100];
19575 sprintf (instr, "ldr%s\t%%|%s, [%%|sp], #4", conditional,
19596 sprintf (instr, "ldmib%s\t%%|sp, {", conditional);
19598 sprintf (instr, "ldm%sib\t%%|sp, {", conditional);
19607 sprintf (instr, "ldmfd%s\t%%|sp, {", conditional);
19609 sprintf (instr, "ldm%sfd\t%%|sp, {", conditional);
19614 sprintf (instr, "po
18893 const char * instr = instr1; local
19473 char instr[100]; local
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