/haiku-buildtools/legacy/binutils/gas/testsuite/gas/bfin/ |
H A D | logical2.s | 11 R7 = R7 & R7;
define 12 R7 = R7 & R0;
define 13 r7 = R7 & R1;
15 R1 = R7 & R7;
16 R2 = R7 & R0;
17 r3 = R7 21 R7 = ~R7; define 22 R7 = ~R0; define 28 R7 = R7 | R7; define 29 R7 = R7 | R1; define 30 R7 = R7 | R0; define 38 R7 = R7 ^ R7; define 39 R7 = R7 ^ R1; define 40 R7 = R7 ^ R0; define [all...] |
H A D | bit2.s | 10 BITCLR ( R7 , 0 ) ;
11 BITCLR ( R7 , 31 ) ;
12 BITCLR ( R7 , 15 ) ;
18 BITSET ( R7 , 0 ) ;
19 BITSET ( R7 , 31 ) ;
20 BITSET ( R7 , 15 ) ;
26 BITTGL ( R7 , 0 ) ;
27 BITTGL ( R7 , 31 ) ;
28 BITTGL ( R7 , 15 ) ;
34 CC = BITTST ( R7 , 50 R7 = DEPOSIT(R0, R1); define 51 R7 = DEPOSIT(R7, R1); define 52 R7 = DEPOSIT(R7, R7); define 58 R7 = DEPOSIT(R0, R1)(X); define 59 R7 = DEPOSIT(R7, R1)(X); define 60 R7 = DEPOSIT(R7, R7)(X); define 66 R7 = EXTRACT(R0, R1.L)(Z); define 67 R7 = EXTRACT(R7, R1.L)(Z); define 68 R7 = EXTRACT(R7, R7.L)(Z); define 74 R7 = EXTRACT(R0, R1.L)(X); define 75 R7 = EXTRACT(R7, R1.L)(X); define 76 R7 = EXTRACT(R7, R7.L)(X); define [all...] |
H A D | logical2.d | 9 0: ff 55 R7=R7&R7; 10 2: c7 55 R7=R7&R0; 11 4: cf 55 R7=R7&R1; 12 6: 7f 54 R1=R7&R7; 13 8: 87 54 R2=R7 [all...] |
H A D | bit2.d | 8 0: 07 4c BITCLR \(R7,0x0\); 9 2: ff 4c BITCLR \(R7,0x1f\); 10 4: 7f 4c BITCLR \(R7,0xf\); 14 c: 07 4a BITSET \(R7,0x0\); 15 e: ff 4a BITSET \(R7,0x1f\); 16 10: 7f 4a BITSET \(R7,0xf\); 20 18: 07 4b BITTGL \(R7,0x0\); 21 1a: ff 4b BITTGL \(R7,0x1f\); 22 1c: 7f 4b BITTGL \(R7,0xf\); 26 24: 07 49 CC = BITTST \(R7, [all...] |
H A D | control_code2.s | 10 CC = R7 == R0;
12 CC = R0 == R7;
15 CC = R7 == -4;
16 CC = R7 == 3;
21 CC = R7 < R0;
23 CC = R7 < R1;
24 CC = R1 < R7;
28 CC = R7 < -4;
30 CC = R7 < 3;
34 CC = R7 < 144 R7 = CC; define [all...] |
H A D | vector2.d | 8 0: 0c c4 13 0e R7.H=R7.L=SIGN\(R2.H\)\*R3.H\+SIGN\(R2.L\)\*R3.L\); 11 c: 0c c4 38 0c R6.H=R6.L=SIGN\(R7.H\)\*R0.H\+SIGN\(R7.L\)\*R0.L\); 14 18: 0c c4 01 0e R7.H=R7.L=SIGN\(R0.H\)\*R1.H\+SIGN\(R0.L\)\*R1.L\); 17 24: 09 c6 01 ce R7=VIT_MAX\(R1,R0\)\(ASR\); 20 30: 09 c6 07 8c R6=VIT_MAX\(R7,R0\)\(ASL\); 23 3c: 09 c6 08 ce R7=VIT_MAX\(R0,R1\)\(ASR\); 25 44: 09 c6 3e ca R5=VIT_MAX\(R6,R7\)\(AS [all...] |
H A D | vector.d | 11 4: 09 c6 15 8e R7=VIT_MAX\(R5,R2\)\(ASL\); 23 24: 00 c4 06 8e R7=R0-\|\+R6 ; 28 38: 00 c4 2e de R7=R5-\|-R6 \(CO\); 29 3c: 01 c4 63 bf R5=R4\+\|\+R3,R7=R4-\|-R3\(SCO,ASR\); 31 44: 21 c4 ca 2d R7=R1\+\|-R2,R6=R1-\|\+R2\(S\); 34 50: 04 c4 39 a6 R0=R7\+R1,R3=R7-R1 \(S\); 35 54: 11 c4 [c-f][[:xdigit:]] 0b R7=A1\+A0,R5=A1-A0 \(NS\); 43 6c: 01 c6 15 0e R7= ASHIFT R5 BY R2.L\(V\); 55 84: 06 c4 17 40 R0=MIN\(R2,R7\)\( [all...] |
H A D | stack.d | 9 4: 47 01 \[--SP\] = R7; 17 10: d0 05 \[--SP\] = \(R7:2, P5:0\); 18 12: 70 05 \[--SP\] = \(R7:6\); 31 24: a8 05 \(R7:5, P5:0\) = \[SP\+\+\]; 32 26: 30 05 \(R7:6\) = \[SP\+\+\];
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H A D | shift.d | 10 4: 4f 41 R7=\(R7\+R1\)<<2; 22 1c: 82 c6 fd 4e R7=R5<<0x1f\(S\); 31 38: 00 c6 07 6e R7.H= ASHIFT R7.L BY R0.L\(S\); 32 3c: 00 c6 07 6e R7.H= ASHIFT R7.L BY R0.L\(S\); 45 5e: ff 4f R7<<=0x1f; 47 64: 80 c6 00 8e R7.L = R0.L << 0x0; 54 80: 7d 40 R5>>=R7; [all...] |
H A D | bit.d | 15 8: b7 4b BITTGL \(R7,0x16\); 21 10: 7f 49 CC = BITTST \(R7,0xf\); 25 16: 0a c6 37 c0 R0=DEPOSIT\(R7,R6\)\(X\); 30 22: 0a c6 23 4e R7=EXTRACT\(R3,R4.L\)\(X\); 37 36: 08 c6 3e 40 BITMUX \(R7,R6,A0 \)\(ASL\); 41 3e: 06 c6 02 ce R7.L=ONES R2;
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H A D | stack.s | 6 [--sp] = R7; 17 [--SP] = (R7:6); 34 (R7:5, P5:0) = [sp++];
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H A D | parallel3.d | 10 8: 09 ce 15 8e R7=VIT_MAX\(R5,R2\)\(ASL\) \|\| \[P0\+\+\]=P0 \|\| NOP; 26 48: 00 cc 06 8e R7=R0-\|\+R6 \|\| \[P1\+\+\]=P0 \|\| NOP; 36 70: 00 cc 2e de R7=R5-\|-R6 \(CO\) \|\| \[P2\]=P0 \|\| NOP; 38 78: 01 cc 63 bf R5=R4\+\|\+R3,R7=R4-\|-R3\(SCO,ASR\) \|\| \[P2\+\+\]=P0 \|\| NOP; 42 88: 21 cc ca 2d R7=R1\+\|-R2,R6=R1-\|\+R2\(S\) \|\| \[P2\+0x24\]=P0 \|\| NOP; 48 a0: 04 cc 39 a6 R0=R7\+R1,R3=R7-R1 \(S\) \|\| \[P3\+\+\]=P0 \|\| NOP; 50 a8: 11 cc c0 0b R7=A1\+A0,R5=A1-A0 \(NS\) \|\| \[P3--\]=P0 \|\| NOP; 62 d8: 01 ce 15 0e R7= ASHIFT R5 BY R2.L\(V\) \|\| \[P4\+0x18\]=P0 \|\| NOP; 74 108: 06 cc 17 40 R0=MIN\(R2,R7\)\( [all...] |
/haiku-buildtools/binutils/gas/testsuite/gas/bfin/ |
H A D | logical2.s | 11 R7 = R7 & R7; define 12 R7 = R7 & R0; define 13 r7 = R7 & R1; 15 R1 = R7 & R7; 16 R2 = R7 & R0; 17 r3 = R7 21 R7 = ~R7; define 22 R7 = ~R0; define 28 R7 = R7 | R7; define 29 R7 = R7 | R1; define 30 R7 = R7 | R0; define 38 R7 = R7 ^ R7; define 39 R7 = R7 ^ R1; define 40 R7 = R7 ^ R0; define [all...] |
H A D | bit2.s | 10 BITCLR ( R7 , 0 ) ; 11 BITCLR ( R7 , 31 ) ; 12 BITCLR ( R7 , 15 ) ; 18 BITSET ( R7 , 0 ) ; 19 BITSET ( R7 , 31 ) ; 20 BITSET ( R7 , 15 ) ; 26 BITTGL ( R7 , 0 ) ; 27 BITTGL ( R7 , 31 ) ; 28 BITTGL ( R7 , 15 ) ; 34 CC = BITTST ( R7 , 50 R7 = DEPOSIT(R0, R1); define 51 R7 = DEPOSIT(R7, R1); define 52 R7 = DEPOSIT(R7, R7); define 58 R7 = DEPOSIT(R0, R1)(X); define 59 R7 = DEPOSIT(R7, R1)(X); define 60 R7 = DEPOSIT(R7, R7)(X); define 66 R7 = EXTRACT(R0, R1.L)(Z); define 67 R7 = EXTRACT(R7, R1.L)(Z); define 68 R7 = EXTRACT(R7, R7.L)(Z); define 74 R7 = EXTRACT(R0, R1.L)(X); define 75 R7 = EXTRACT(R7, R1.L)(X); define 76 R7 = EXTRACT(R7, R7.L)(X); define [all...] |
H A D | logical2.d | 9 0: ff 55 R7 = R7 & R7; 10 2: c7 55 R7 = R7 & R0; 11 4: cf 55 R7 = R7 & R1; 12 6: 7f 54 R1 = R7 & R7; 13 8: 87 54 R2 = R7 [all...] |
H A D | bit2.d | 8 0: 07 4c BITCLR \(R7, 0x0\);.* 9 2: ff 4c BITCLR \(R7, 0x1f\);.* 10 4: 7f 4c BITCLR \(R7, 0xf\);.* 14 c: 07 4a BITSET \(R7, 0x0\);.* 15 e: ff 4a BITSET \(R7, 0x1f\);.* 16 10: 7f 4a BITSET \(R7, 0xf\);.* 20 18: 07 4b BITTGL \(R7, 0x0\);.* 21 1a: ff 4b BITTGL \(R7, 0x1f\);.* 22 1c: 7f 4b BITTGL \(R7, 0xf\);.* 26 24: 07 49 CC = BITTST \(R7, [all...] |
H A D | control_code2.s | 10 CC = R7 == R0; 12 CC = R0 == R7; 15 CC = R7 == -4; 16 CC = R7 == 3; 21 CC = R7 < R0; 23 CC = R7 < R1; 24 CC = R1 < R7; 28 CC = R7 < -4; 30 CC = R7 < 3; 34 CC = R7 < 144 R7 = CC; define [all...] |
H A D | vector2.d | 8 0: 0c c4 13 0e R7.H = R7.L = SIGN \(R2.H\) \* R3.H \+ SIGN \(R2.L\) \* R3.L; 11 c: 0c c4 38 0c R6.H = R6.L = SIGN \(R7.H\) \* R0.H \+ SIGN \(R7.L\) \* R0.L; 14 18: 0c c4 01 0e R7.H = R7.L = SIGN \(R0.H\) \* R1.H \+ SIGN \(R0.L\) \* R1.L; 17 24: 09 c6 01 ce R7 = VIT_MAX \(R1, R0\) \(ASR\); 20 30: 09 c6 07 8c R6 = VIT_MAX \(R7, R0\) \(ASL\); 23 3c: 09 c6 08 ce R7 = VIT_MAX \(R0, R1\) \(ASR\); 25 44: 09 c6 3e ca R5 = VIT_MAX \(R6, R7\) \(AS [all...] |
H A D | vector.d | 11 4: 09 c6 15 8e R7 = VIT_MAX \(R5, R2\) \(ASL\); 23 24: 00 c4 06 8e R7 = R0 -\|\+ R6; 28 38: 00 c4 2e de R7 = R5 -\|- R6 \(CO\); 29 3c: 01 c4 63 bf R5 = R4 \+\|\+ R3, R7 = R4 -\|- R3 \(SCO, ASR\); 31 44: 21 c4 ca 2d R7 = R1 \+\|- R2, R6 = R1 -\|\+ R2 \(S\); 34 50: 04 c4 39 a6 R0 = R7 \+ R1, R3 = R7 - R1 \(S\); 35 54: 11 c4 [c-f][[:xdigit:]] 0b R7 = A1 \+ A0, R5 = A1 - A0 \(NS\); 43 6c: 01 c6 15 0e R7 = ASHIFT R5 BY R2.L \(V\); 55 84: 06 c4 17 40 R0 = MIN \(R2, R7\) \( [all...] |
H A D | stack.d | 9 4: 47 01 \[--SP\] = R7; 17 10: d0 05 \[--SP\] = \(R7:2, P5:0\); 18 12: 70 05 \[--SP\] = \(R7:6\); 31 24: a8 05 \(R7:5, P5:0\) = \[SP\+\+\]; 32 26: 30 05 \(R7:6\) = \[SP\+\+\];
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H A D | shift.d | 10 4: 4f 41 R7 = \(R7 \+ R1\) << 0x2; 22 1c: 82 c6 fd 4e R7 = R5 << 0x1f \(S\); 31 38: 00 c6 07 6e R7.H = ASHIFT R7.L BY R0.L \(S\); 32 3c: 00 c6 07 6e R7.H = ASHIFT R7.L BY R0.L \(S\); 45 5e: ff 4f R7 <<= 0x1f; 47 64: 80 c6 00 8e R7.L = R0.L << 0x0; 54 80: 7d 40 R5 >>= R7; [all...] |
H A D | bit.d | 15 8: b7 4b BITTGL \(R7, 0x16\);.* 21 10: 7f 49 CC = BITTST \(R7, 0xf\);.* 25 16: 0a c6 37 c0 R0 = DEPOSIT \(R7, R6\) \(X\); 30 22: 0a c6 23 4e R7 = EXTRACT \(R3, R4.L\) \(X\); 37 36: 08 c6 3e 40 BITMUX \(R7, R6, A0\) \(ASL\); 41 3e: 06 c6 02 ce R7.L = ONES R2;
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H A D | stack.s | 6 [--sp] = R7; 17 [--SP] = (R7:6); 34 (R7:5, P5:0) = [sp++];
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H A D | parallel3.d | 10 8: 09 ce 15 8e R7 = VIT_MAX \(R5, R2\) \(ASL\) \|\| \[P0\+\+\] = P0 \|\| NOP; 26 48: 00 cc 06 8e R7 = R0 -\|\+ R6 \|\| \[P1\+\+\] = P0 \|\| NOP; 36 70: 00 cc 2e de R7 = R5 -\|- R6 \(CO\) \|\| \[P2\] = P0 \|\| NOP; 38 78: 01 cc 63 bf R5 = R4 \+\|\+ R3, R7 = R4 -\|- R3 \(SCO, ASR\) \|\| \[P2\+\+\] = P0 \|\| NOP; 42 88: 21 cc ca 2d R7 = R1 \+\|- R2, R6 = R1 -\|\+ R2 \(S\) \|\| \[P2 \+ 0x24\] = P0 \|\| NOP; 48 a0: 04 cc 39 a6 R0 = R7 \+ R1, R3 = R7 - R1 \(S\) \|\| \[P3\+\+\] = P0 \|\| NOP; 50 a8: 11 cc ff 0b R7 = A1 \+ A0, R5 = A1 - A0 \(NS\) \|\| \[P3--\] = P0 \|\| NOP; 62 d8: 01 ce 15 0e R7 = ASHIFT R5 BY R2.L \(V\) \|\| \[P4 \+ 0x18\] = P0 \|\| NOP; 74 108: 06 cc 17 40 R0 = MIN \(R2, R7\) \( [all...] |
H A D | arithmetic.d | 20 1e: 04 c4 3a 0e R7 = R7 \+ R2 \(NS\); 29 3a: 05 c4 3d d2 R1.L = R7 - R5 \(RND20\); 33 42: 25 c4 3e 0e R7.H = R7 \+ R6 \(RND12\); 63 7c: 07 c4 38 48 R4 = MIN \(R7, R0\); 80 a0: 0b c4 [0-3][[:xdigit:]] 0e R7 = \(A0 \+= A1\); 87 b4: 80 c2 db 23 R7.L = R3.L \* R3.H \(FU\); 91 c4: 94 c3 be 40 R2.H = R7.L \* R6.H \(M, IU\); 94 d0: 1c c3 3e 80 R1 = R7 [all...] |