Searched refs:OP_REG (Results 1 - 19 of 19) sorted by relevance

/haiku-buildtools/legacy/binutils/opcodes/
H A Dtic80-opc.c523 #define OP_REG(x) OP_LI(x) /* For readability */
614 {"br", OP_REG(0x390), 0xFFFFF000, 0, {REG_0} },
617 {"br.a", OP_REG(0x392), 0xFFFFF000, 0, {REG_0} },
623 {"add", OP_REG(0x3B0), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
629 {"addu", OP_REG(0x3B2), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
635 {"and", OP_REG(0x322), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
638 {"and.tt", OP_REG(0x322), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
644 {"and.ff", OP_REG(0x330), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
650 {"and.ft", OP_REG(0x328), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
656 {"and.tf", OP_REG(
520 #define OP_REG macro
[all...]
H A Darc-opc.c27 enum operand {OP_NONE,OP_REG,OP_SHIMM,OP_LIMM}; enumerator in enum:operand
432 op_type = OP_REG;
571 ls_operand[LS_BASE] = OP_REG;
623 ls_operand[LS_OFFSET] = OP_REG;
717 if (!((ST_SYNTAX(OP_REG,OP_REG,OP_NONE) && (insn[0] & 511) == 0)
718 || ST_SYNTAX(OP_REG,OP_LIMM,OP_NONE)
719 || (ST_SYNTAX(OP_SHIMM,OP_REG,OP_NONE) && (insn[0] & 511) == 0)
724 || (ST_SYNTAX(OP_LIMM,OP_REG,OP_NONE) && (insn[0] & 511) == 0)
725 || ST_SYNTAX(OP_REG,OP_RE
[all...]
H A Di386-dis.c67 static void OP_REG (int, int);
243 #define RMeAX OP_REG, eAX_reg
244 #define RMeBX OP_REG, eBX_reg
245 #define RMeCX OP_REG, eCX_reg
246 #define RMeDX OP_REG, eDX_reg
247 #define RMeSP OP_REG, eSP_reg
248 #define RMeBP OP_REG, eBP_reg
249 #define RMeSI OP_REG, eSI_reg
250 #define RMeDI OP_REG, eDI_reg
251 #define RMrAX OP_REG, rAX_re
3729 OP_REG (int code, int sizeflag) function
[all...]
H A Dm68hc11-opc.c90 #define OP_REG M6812_OP_REG macro
459 | OP_REG | OP_JUMP_REL,3, 0x04, 3, 3, CHG_NONE, cpu6812 },
461 | OP_REG | OP_JUMP_REL,3, 0x04, 3, 3, CHG_NONE, cpu6812 },
540 | OP_REG | OP_REG_2, 2, 0xb7, 1, 1, CHG_NONE, cpu6812 },
546 | OP_REG | OP_JUMP_REL, 3, 0x04, 3, 3, CHG_NONE, cpu6812 },
548 | OP_REG | OP_JUMP_REL, 3, 0x04, 3, 3, CHG_NONE, cpu6812 },
893 | OP_REG | OP_REG_2, 2, 0xb7, 1, 1, CHG_NONE, cpu6812 },
1018 | OP_REG | OP_JUMP_REL, 3, 0x04, 3, 3, CHG_NONE, cpu6812 },
1023 | OP_REG | OP_JUMP_REL, 3, 0x04, 3, 3, CHG_NONE, cpu6812 },
/haiku-buildtools/binutils/opcodes/
H A Dtic80-opc.c518 #define OP_REG(x) OP_LI(x) /* For readability */
609 {"br", OP_REG(0x390), 0xFFFFF000, 0, {REG_0} },
612 {"br.a", OP_REG(0x392), 0xFFFFF000, 0, {REG_0} },
618 {"add", OP_REG(0x3B0), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
624 {"addu", OP_REG(0x3B2), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
630 {"and", OP_REG(0x322), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
633 {"and.tt", OP_REG(0x322), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
639 {"and.ff", OP_REG(0x330), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
645 {"and.ft", OP_REG(0x328), MASK_REG, 0, {REG_0, REG_22, REG_DEST} },
651 {"and.tf", OP_REG(
515 #define OP_REG macro
[all...]
H A Dmips-formats.h67 { OP_REG, SIZE, LSB }, OP_REG_##BANK, 0 \
85 { OP_REG, SIZE, LSB }, OP_REG_##BANK, MAP \
H A Di386-dis.c63 static void OP_REG (int, int);
300 #define RMeAX { OP_REG, eAX_reg }
301 #define RMeBX { OP_REG, eBX_reg }
302 #define RMeCX { OP_REG, eCX_reg }
303 #define RMeDX { OP_REG, eDX_reg }
304 #define RMeSP { OP_REG, eSP_reg }
305 #define RMeBP { OP_REG, eBP_reg }
306 #define RMeSI { OP_REG, eSI_reg }
307 #define RMeDI { OP_REG, eDI_reg }
308 #define RMrAX { OP_REG, rAX_re
15609 OP_REG (int code, int sizeflag) function
[all...]
H A Dm68hc11-opc.c92 #define OP_REG M6812_OP_REG macro
628 | OP_REG | OP_JUMP_REL,3, 0x04, 3, 3, CHG_NONE, cpu6812|cpu9s12x, 0 },
630 | OP_REG | OP_JUMP_REL,3, 0x04, 3, 3, CHG_NONE, cpu6812|cpu9s12x, 0 },
739 | OP_REG | OP_REG_2, 2, 0xb7, 1, 1, CHG_NONE, cpu6812|cpu9s12x, 0 },
841 | OP_REG | OP_JUMP_REL, 3, 0x04, 3, 3, CHG_NONE, cpu6812|cpu9s12x, 0 },
843 | OP_REG | OP_JUMP_REL, 3, 0x04, 3, 3, CHG_NONE, cpu6812|cpu9s12x, 0 },
1386 | OP_REG | OP_REG_2, 2, 0xb7, 1, 1, CHG_NONE, cpu6812|cpu9s12x, 0 },
1530 | OP_REG | OP_JUMP_REL, 3, 0x04, 3, 3, CHG_NONE, cpu6812|cpu9s12x, 0 },
1535 | OP_REG | OP_JUMP_REL, 3, 0x04, 3, 3, CHG_NONE, cpu6812|cpu9s12x, 0 },
H A Dmips-dis.c1145 /* The type and number of the last OP_REG seen. We only use this for
1254 case OP_REG:
1519 case OP_REG:
1641 if (operand->type == OP_REG
/haiku-buildtools/binutils/gas/config/
H A Dtc-msp430.c1805 op->mode = OP_REG;
1812 op->mode = OP_REG;
1819 op->mode = OP_REG;
1826 op->mode = OP_REG;
1842 op->mode = OP_REG;
1858 op->mode = OP_REG;
1892 op->mode = OP_REG;
1899 op->mode = OP_REG;
1906 op->mode = OP_REG;
1913 op->mode = OP_REG;
[all...]
H A Dtc-mips.c4489 case OP_REG:
4731 /* The last OP_REG operand seen, or ILLEGAL_REG if none. */
4734 /* If the first operand was an OP_REG, this is the register that it
5185 /* OP_REG matcher. */
6013 case OP_REG:
/haiku-buildtools/legacy/binutils/gas/config/
H A Dtc-msp430.c1025 op->mode = OP_REG;
1032 op->mode = OP_REG;
1039 op->mode = OP_REG;
1046 op->mode = OP_REG;
1062 op->mode = OP_REG;
1079 op->mode = OP_REG;
1109 op->mode = OP_REG;
1116 op->mode = OP_REG;
1123 op->mode = OP_REG;
1130 op->mode = OP_REG;
[all...]
/haiku-buildtools/legacy/binutils/include/opcode/
H A Dmsp430.h29 #define OP_REG 0 macro
/haiku-buildtools/legacy/binutils/include/elf/
H A Ddwarf.h180 OP_REG = 0x01, enumerator in enum:dwarf_location_atom
/haiku-buildtools/legacy/gcc/gcc/
H A Ddwarf.h177 OP_REG = 0x01, enumerator in enum:dwarf_location_atom
H A Ddwarfout.c1071 case OP_REG: return "OP_REG";
1758 distinction between OP_REG and OP_BASEREG. */
1802 a register, we just generate an OP_REG and the register number. For a
1824 ASM_OUTPUT_DWARF_STACK_OP (asm_out_file, OP_REG);
/haiku-buildtools/binutils/include/elf/
H A Ddwarf.h179 OP_REG = 0x01, enumerator in enum:dwarf_location_atom
/haiku-buildtools/binutils/include/opcode/
H A Dmsp430.h31 #define OP_REG 0 macro
H A Dmips.h349 OP_REG, enumerator in enum:mips_operand_type
351 /* Like OP_REG, but can be omitted if the register is the same as the

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