Searched refs:CR2W (Results 1 - 4 of 4) sorted by relevance

/haiku/src/add-ons/accelerants/matrox/engine/
H A Dmga_crtc2.c32 CR2W(DATACTL, (CR2R(DATACTL) & ~0x00000010));
35 CR2W(CTL, (CR2R(CTL) & ~0x02001000));
38 CR2W(HPARAM, ((((target.timing.h_display - 8) & 0x0fff) << 16) |
40 CR2W(HSYNC, ((((target.timing.h_sync_end - 8) & 0x0fff) << 16) |
42 CR2W(VPARAM, ((((target.timing.v_display - 1) & 0x0fff) << 16) |
44 CR2W(VSYNC, ((((target.timing.v_sync_end - 1) & 0x0fff) << 16) |
47 //CR2W(PRELOAD, (((target.timing.v_sync_start & 0x0fff) << 16) |
49 CR2W(PRELOAD, ((((target.timing.v_sync_start - 1) & 0x0fff) << 16) |
55 CR2W(MISC, temp);
80 CR2W(DATACT
[all...]
H A Dmga_maven.c280 CR2W(CTL, (CR2R(CTL) | 0x08)); /* disable the VIDPLL */
281 CR2W(CTL, (CR2R(CTL) | 0x06)); /* select the VIDPLL */
297 CR2W(CTL, (CR2R(CTL) & ~0x08)); /* enable the VIDPLL */
479 CR2W(CTL, (CR2R(CTL) | 0x06)); /* select the VIDPLL */
518 CR2W(CTL, (CR2R(CTL) | 0x08)); /* disable the VIDPLL */
536 CR2W(CTL, (CR2R(CTL) & ~0x08)); /* enable the VIDPLL */
555 CR2W(CTL, (CR2R(CTL) & ~0x08)); /* enable the VIDPLL */
H A Dmga_general.c598 CR2W(DATACTL,0x00000000);
755 CR2W(DATACTL,0x00000000);
815 if (si->ps.secondary_head) CR2W(CTL,(CR2R(CTL)&0xffe00779)|0xD0000002);
827 if (si->ps.secondary_head) CR2W(CTL,(CR2R(CTL)&0x2fe00779)|0x4|(0x1<<20));
845 CR2W(CTL,(CR2R(CTL)&0x2de00779)|0x6|(0x0<<20));
863 CR2W(CTL,(CR2R(CTL)&0x2de00779)|0x6|(0x1<<20));
/haiku/headers/private/graphics/matrox/
H A Dmga_macros.h346 #define CR2W(A,B) (MGA_REG32(MGACR2_##A)=B) macro

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