Searched refs:set_bitsl (Results 1 - 3 of 3) sorted by relevance
/fuchsia/zircon/system/dev/block/imx-sdhci/ |
H A D | imx-sdhci.c | 400 set_bitsl(IMX_SDHC_SYS_CTRL_RSTC, &dev->regs->sys_ctrl); 402 set_bitsl( IMX_SDHC_SYS_CTRL_RSTD, &dev->regs->sys_ctrl); 643 set_bitsl(IMX_SDHC_PROT_CTRL_DMASEL_ADMA2, &dev->regs->prot_ctrl); 645 set_bitsl(IMX_SDHC_MIX_CTRL_DMAEN, ®s->mix_ctrl); 684 set_bitsl(cmd & IMX_SDHC_MIX_CTRL_CMD_MASK, ®s->mix_ctrl); 801 set_bitsl(IMX_SDHC_PROT_CTRL_DTW_1, &dev->regs->prot_ctrl); 805 set_bitsl(IMX_SDHC_PROT_CTRL_DTW_4, &dev->regs->prot_ctrl); 809 set_bitsl(IMX_SDHC_PROT_CTRL_DTW_8, &dev->regs->prot_ctrl); 849 set_bitsl(IMX_SDHC_MIX_CTRL_DDR_EN, ®s->mix_ctrl); 856 set_bitsl((pre_di [all...] |
/fuchsia/zircon/system/ulib/ddk/include/hw/ |
H A D | reg.h | 100 #define set_bitsl(v, a) writel(readl(a) | (v), (a)) macro
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/fuchsia/zircon/system/dev/ethernet/aml-ethernet-s912/ |
H A D | aml-ethernet.cpp | 152 set_bitsl(1 << 3, offset_ptr<uint32_t>(hregs, HHI_GCLK_MPEG1));
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