Lines Matching refs:set_bitsl
400 set_bitsl(IMX_SDHC_SYS_CTRL_RSTC, &dev->regs->sys_ctrl);
402 set_bitsl( IMX_SDHC_SYS_CTRL_RSTD, &dev->regs->sys_ctrl);
643 set_bitsl(IMX_SDHC_PROT_CTRL_DMASEL_ADMA2, &dev->regs->prot_ctrl);
645 set_bitsl(IMX_SDHC_MIX_CTRL_DMAEN, ®s->mix_ctrl);
684 set_bitsl(cmd & IMX_SDHC_MIX_CTRL_CMD_MASK, ®s->mix_ctrl);
801 set_bitsl(IMX_SDHC_PROT_CTRL_DTW_1, &dev->regs->prot_ctrl);
805 set_bitsl(IMX_SDHC_PROT_CTRL_DTW_4, &dev->regs->prot_ctrl);
809 set_bitsl(IMX_SDHC_PROT_CTRL_DTW_8, &dev->regs->prot_ctrl);
849 set_bitsl(IMX_SDHC_MIX_CTRL_DDR_EN, ®s->mix_ctrl);
856 set_bitsl((pre_div << IMX_SDHC_SYS_CTRL_PREDIV_SHIFT) |
863 set_bitsl(IMX_SDHC_VEND_SPEC_IPG_PERCLK_SOFT_EN | IMX_SDHC_VEND_SPEC_CARD_CLK_SOFT_EN,
957 set_bitsl(IMX_SDHC_SYS_CTRL_RSTA, &dev->regs->sys_ctrl);
970 set_bitsl(IMX_SDHC_VEND_SPEC_HCLK_SOFT_EN | IMX_SDHC_VEND_SPEC_IPG_CLK_SOFT_EN,
973 set_bitsl(IMX_SDHC_SYS_CTRL_DTOCV(0xe), &dev->regs->sys_ctrl);
985 set_bitsl(1 << 1, &dev->regs->vend_spec);
1200 set_bitsl(IMX_SDHC_PROT_CTRL_DMASEL_ADMA2, &dev->regs->prot_ctrl);