Searched refs:ctrl0 (Results 1 - 3 of 3) sorted by relevance

/fuchsia/zircon/system/dev/block/sdhci/
H A Dsdhci.c670 if ((regs->ctrl0 & expected_mask) != expected_mask) {
671 zxlogf(TRACE, "sdhci: after voltage switch ctrl0=0x%08x, expected=0x%08x\n",
672 regs->ctrl0, expected_mask);
706 dev->regs->ctrl0 &= ~SDHCI_HOSTCTRL_EXT_DATA_WIDTH;
707 dev->regs->ctrl0 &= ~SDHCI_HOSTCTRL_FOUR_BIT_BUS_WIDTH;
710 dev->regs->ctrl0 &= ~SDHCI_HOSTCTRL_EXT_DATA_WIDTH;
711 dev->regs->ctrl0 |= SDHCI_HOSTCTRL_FOUR_BIT_BUS_WIDTH;
714 dev->regs->ctrl0 |= SDHCI_HOSTCTRL_EXT_DATA_WIDTH;
782 dev->regs->ctrl0 |= SDHCI_HOSTCTRL_HIGHSPEED_ENABLE;
784 dev->regs->ctrl0
1022 uint32_t ctrl0 = dev->regs->ctrl0 & ~SDHCI_PWRCTRL_SD_BUS_VOLTAGE_MASK; local
[all...]
/fuchsia/zircon/system/dev/block/pci-sdhci/
H A Dpci-sdhci.c91 uint32_t val = dev->regs->ctrl0;
93 dev->regs->ctrl0 = val;
97 dev->regs->ctrl0 = val;
/fuchsia/zircon/system/ulib/ddk/include/hw/
H A Dsdhci.h61 uint32_t ctrl0; // 28h member in struct:sdhci_regs

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