Searched refs:HHI_VIID_CLK_CNTL (Results 1 - 3 of 3) sorted by relevance
| /fuchsia/zircon/system/dev/display/astro-display/ |
| H A D | astro-clock.cpp | 152 SET_BIT32(HHI, HHI_VIID_CLK_CNTL, 0, 0, 5);
153 SET_BIT32(HHI, HHI_VIID_CLK_CNTL, 0, VCLK2_EN, 1);
209 SET_BIT32(HHI, HHI_VIID_CLK_CNTL, 0, VCLK2_EN, 1);
238 SET_BIT32(HHI, HHI_VIID_CLK_CNTL, 0, VCLK2_CLK_IN_SEL, 3);
239 SET_BIT32(HHI, HHI_VIID_CLK_CNTL, 1, VCLK2_EN, 1);
248 SET_BIT32(HHI, HHI_VIID_CLK_CNTL, 1, VCLK2_DIV1_EN, 1);
249 SET_BIT32(HHI, HHI_VIID_CLK_CNTL, 1, VCLK2_SOFT_RST, 1);
251 SET_BIT32(HHI, HHI_VIID_CLK_CNTL, 0, VCLK2_SOFT_RST, 1);
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| H A D | hhi-regs.h | 13 #define HHI_VIID_CLK_CNTL (0x04b << 2) macro
115 // HHI_VIID_CLK_CNTL Register Bit Def
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| /fuchsia/zircon/system/dev/lib/amlogic/include/soc/aml-s912/ |
| H A D | s912-hw.h | 141 #define HHI_VIID_CLK_CNTL (0x4B << 2) macro
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