Searched refs:HHI_VID_PLL_CLK_DIV (Results 1 - 5 of 5) sorted by relevance
| /fuchsia/zircon/system/dev/display/vim-display/ |
| H A D | hdmitx_clk.cpp | 89 SET_BIT32(HHI, HHI_VID_PLL_CLK_DIV, 0, 1, 19);
90 SET_BIT32(HHI, HHI_VID_PLL_CLK_DIV, 0, 1, 15);
114 SET_BIT32(HHI, HHI_VID_PLL_CLK_DIV, 1, 1, 18);
116 SET_BIT32(HHI, HHI_VID_PLL_CLK_DIV, 0, 1, 18);
117 SET_BIT32(HHI, HHI_VID_PLL_CLK_DIV, 0, 2, 16);
118 SET_BIT32(HHI, HHI_VID_PLL_CLK_DIV, 0, 1, 15);
119 SET_BIT32(HHI, HHI_VID_PLL_CLK_DIV, 0, 14, 0);
121 SET_BIT32(HHI, HHI_VID_PLL_CLK_DIV, shift_sel, 2, 16);
122 SET_BIT32(HHI, HHI_VID_PLL_CLK_DIV, 1, 1, 15);
123 SET_BIT32(HHI, HHI_VID_PLL_CLK_DIV, shift_va
[all...] |
| H A D | vpu.h | 33 #define HHI_VID_PLL_CLK_DIV (0x68 << 2) macro
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| /fuchsia/zircon/system/dev/display/astro-display/ |
| H A D | hhi-regs.h | 17 #define HHI_VID_PLL_CLK_DIV (0x068 << 2) macro
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| H A D | astro-clock.cpp | 213 SET_BIT32(HHI, HHI_VID_PLL_CLK_DIV, 0, 19, 1);
214 SET_BIT32(HHI, HHI_VID_PLL_CLK_DIV, 0, 15, 1);
216 SET_BIT32(HHI, HHI_VID_PLL_CLK_DIV, 1, 18, 1); // Undocumented register bit
219 SET_BIT32(HHI, HHI_VID_PLL_CLK_DIV, 1, 19, 1); // Undocumented register bit
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| /fuchsia/zircon/system/dev/lib/amlogic/include/soc/aml-s912/ |
| H A D | s912-hw.h | 156 #define HHI_VID_PLL_CLK_DIV (0x68 << 2) macro
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