Searched refs:HHI_HDMI_PLL_CNTL (Results 1 - 4 of 4) sorted by relevance
| /fuchsia/zircon/system/dev/display/vim-display/ |
| H A D | hdmitx_clk.cpp | 62 WRITE32_REG(HHI, HHI_HDMI_PLL_CNTL, regVal);
63 SET_BIT32(HHI, HHI_HDMI_PLL_CNTL, n, PLL_CNTL_M_BITS, PLL_CNTL_M_START);
72 SET_BIT32(HHI, HHI_HDMI_PLL_CNTL, 0x1, 1, 28);
73 SET_BIT32(HHI, HHI_HDMI_PLL_CNTL, 0x0, 1, 28);
74 WAIT_FOR_PLL_LOCKED(HHI_HDMI_PLL_CNTL);
75 DISP_INFO("HPLL: 0x%x\n", READ32_HHI_REG(HHI_HDMI_PLL_CNTL));
|
| H A D | vpu.h | 113 #define HHI_HDMI_PLL_CNTL (0xc8 << 2) macro
|
| H A D | hdmitx.cpp | 84 WRITE32_REG(HHI,HHI_HDMI_PLL_CNTL, 0);
|
| /fuchsia/zircon/system/dev/lib/amlogic/include/soc/aml-s912/ |
| H A D | s912-hw.h | 197 #define HHI_HDMI_PLL_CNTL (0xC8 << 2) macro
|
Completed in 35 milliseconds