Searched refs:DW_DSI_PHY_TMR_CFG (Results 1 - 4 of 4) sorted by relevance
| /fuchsia/zircon/system/dev/display/astro-display/ |
| H A D | dw-mipi-dsi-reg.h | 51 #define DW_DSI_PHY_TMR_CFG (0x27 << 2) // time for the data lanes macro
131 // DW_DSI_PHY_TMR_CFG Register Bit Def
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| H A D | aml-dsi-host.cpp | 81 WRITE32_REG(MIPI_DSI, DW_DSI_PHY_TMR_CFG,
299 DISP_INFO("DW_DSI_PHY_TMR_CFG = 0x%x\n", READ32_REG(MIPI_DSI, DW_DSI_PHY_TMR_CFG));
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| /fuchsia/zircon/system/dev/display/hikey-display/ |
| H A D | dsi.c | 328 DW_DSI_SET_BITS32(DW_DSI_PHY_TMR_CFG, data_lane_lp2hs_time, 10, 0);
329 DW_DSI_SET_BITS32(DW_DSI_PHY_TMR_CFG, data_lane_hs2lp_time, 10, 16);
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| H A D | dsi.h | 66 #define DW_DSI_PHY_TMR_CFG 0x9c /* time for the data lanes */ macro
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