Searched refs:DW_DSI_LPCLK_CTRL (Results 1 - 5 of 5) sorted by relevance
| /fuchsia/zircon/system/dev/display/astro-display/ |
| H A D | dw-mipi-dsi-reg.h | 49 #define DW_DSI_LPCLK_CTRL (0x25 << 2) // non continuous clock in the clock lane. macro
138 // DW_DSI_LPCLK_CTRL Register Bit Def
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| H A D | aml-dsi-host.cpp | 188 SET_BIT32(MIPI_DSI, DW_DSI_LPCLK_CTRL, 1, LPCLK_CTRL_AUTOCLKLANE_CTRL, 1);
297 DISP_INFO("DW_DSI_LPCLK_CTRL = 0x%x\n", READ32_REG(MIPI_DSI, DW_DSI_LPCLK_CTRL));
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| H A D | aml-mipi-phy.cpp | 248 WRITE32_REG(MIPI_DSI, DW_DSI_LPCLK_CTRL, (0x1 << LPCLK_CTRL_AUTOCLKLANE_CTRL) |
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| /fuchsia/zircon/system/dev/display/hikey-display/ |
| H A D | dsi.h | 64 #define DW_DSI_LPCLK_CTRL 0x94 /* non continuous clock in the clock lane. */ macro
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| H A D | dsi.c | 341 DW_DSI_SET_BITS32(DW_DSI_LPCLK_CTRL, 0x1, 2, 0);
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