Searched refs:isMemOp (Results 1 - 9 of 9) sorted by relevance

/freebsd-current/contrib/llvm-project/llvm/lib/MCA/HardwareUnits/
H A DScheduler.cpp86 if (IS->isMemOp()) {
106 HasDependentUsers |= Inst.isMemOp() && LSU.hasDependentUsers(IR);
135 if (IS.isMemOp() && !LSU.isReady(IR)) {
172 if (IS.isMemOp() && LSU.isWaiting(IR)) {
256 if (IS.isMemOp() && LSU.isPending(IR))
305 if (IS.isMemOp())
308 if (IS.isDispatched() || (IS.isMemOp() && LSU.isWaiting(IR))) {
314 if (IS.isPending() || (IS.isMemOp() && LSU.isPending(IR))) {
322 assert(IS.isReady() && (!IS.isMemOp() || LSU.isReady(IR)) &&
H A DLSUnit.cpp235 if (!IS.isMemOp())
/freebsd-current/contrib/llvm-project/llvm/lib/MCA/Stages/
H A DRetireStage.cpp66 if (Inst.isMemOp())
H A DInOrderIssueStage.cpp129 if (IR.getInstruction()->isMemOp() && !LSU.isReady(IR)) {
200 if (IS.isMemOp())
237 if (IS.isMemOp())
344 if (IS.isMemOp())
/freebsd-current/contrib/llvm-project/llvm/lib/Target/M68k/AsmParser/
H A DM68kAsmParser.cpp150 bool isMemOp() const { return Kind == KindTy::MemOp; } function in class:__anon2490::M68kOperand
382 if (!isMemOp())
409 return isMemOp() && MemOp.Op == M68kMemOp::Kind::Addr;
428 return isMemOp() && MemOp.Op == M68kMemOp::Kind::RegIndirect &&
437 return isMemOp() && MemOp.Op == M68kMemOp::Kind::RegIndirectDisplacement &&
447 return isMemOp() &&
459 return isMemOp() && MemOp.Op == M68kMemOp::Kind::RegPreDecrement &&
468 return isMemOp() && MemOp.Op == M68kMemOp::Kind::RegPostIncrement &&
477 return isMemOp() && MemOp.Op == M68kMemOp::Kind::RegIndirectDisplacement &&
486 return isMemOp()
[all...]
/freebsd-current/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonVLIWPacketizer.cpp1307 if (HII->isNewValueInst(J) || HII->isMemOp(J) || HII->isMemOp(I))
1312 bool MopStI = HII->isMemOp(I) || StoreI;
1313 bool MopStJ = HII->isMemOp(J) || StoreJ;
1550 (!HII->isMemOp(J) && !HII->isMemOp(I)) && (!IsVecJ && !IsVecI))
1697 if (HII->isMemOp(*MJ))
H A DHexagonInstrInfo.h381 bool isMemOp(const MachineInstr &MI) const;
H A DHexagonInstrInfo.cpp1993 if (MIa.mayLoad() && !isMemOp(MIa) && MIb.mayLoad() && !isMemOp(MIb))
2135 !isMemOp(MI) && !MI.isBranch() && !MI.isReturn() && !MI.isCall();
2439 bool HexagonInstrInfo::isMemOp(const MachineInstr &MI) const { function in class:HexagonInstrInfo
3267 !isMemOp(MI) && !isPostIncrement(MI))
3300 if (isMemOp(MI)) {
/freebsd-current/contrib/llvm-project/llvm/include/llvm/MCA/
H A DInstruction.h578 bool isMemOp() const { return MayLoad || MayStore; } function in namespace:llvm::mca

Completed in 202 milliseconds