| /freebsd-current/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsTargetMachine.cpp | 75 bool isLittle) {
80 if (isLittle)
127 bool isLittle)
128 : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT,
131 isLittle(isLittle), TLOF(std::make_unique<MipsTargetObjectFile>()),
134 DefaultSubtarget(TT, CPU, FS, isLittle, *this, std::nullopt),
136 isLittle, *this, std::nullopt),
138 isLittle, *this, std::nullopt) {
206 TargetTriple, CPU, FS, isLittle, *thi
73 computeDataLayout(const Triple &TT, StringRef CPU, const TargetOptions &Options, bool isLittle) argument
121 MipsTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional<Reloc::Model> RM, std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, bool JIT, bool isLittle) argument
[all...] |
| H A D | MipsTargetMachine.h | 28 bool isLittle; member in class:llvm::MipsTargetMachine
44 bool JIT, bool isLittle);
79 bool isLittleEndian() const { return isLittle; }
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| H A D | MipsSubtarget.h | 283 bool isLittle() const { return IsLittle; } function in class:llvm::MipsSubtarget
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| H A D | MipsAsmPrinter.cpp | 549 RegOp = (Subtarget->isLittle()) ? OpNum + 1 : OpNum;
552 RegOp = (Subtarget->isLittle()) ? OpNum : OpNum + 1;
600 if (Subtarget->isLittle())
604 if (!Subtarget->isLittle())
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| H A D | MipsISelDAGToDAG.cpp | 244 8, !Subtarget->isLittle()))
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| H A D | MipsSEFrameLowering.cpp | 324 if (!Subtarget.isLittle())
375 int64_t Offset = 4 * (Subtarget.isLittle() ? N : (1 - N));
467 if (!STI.isLittle())
483 if (!STI.isLittle())
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| H A D | MipsISelLowering.cpp | 1799 if (Subtarget.isLittle()) {
1986 if (Subtarget.isLittle()) {
2322 if (!Subtarget.isLittle() && ArgSizeInBytes < ArgSlotSizeInBytes) {
2700 bool IsLittle = Subtarget.isLittle();
2822 return lowerUnalignedIntStore(SD, DAG, Subtarget.isLittle());
2892 if (ArgFlags.isInReg() && !Subtarget.isLittle()) {
3295 FirstByValReg, LastByValReg, Flags, Subtarget.isLittle(),
3316 if (!Subtarget.isLittle())
3715 if (!Subtarget.isLittle())
4407 unsigned LastReg, const ISD::ArgFlagsTy &Flags, bool isLittle,
4402 passByValArg( SDValue Chain, const SDLoc &DL, std::deque<std::pair<unsigned, SDValue>> &RegsToPass, SmallVectorImpl<SDValue> &MemOpChains, SDValue StackPtr, MachineFrameInfo &MFI, SelectionDAG &DAG, SDValue Arg, unsigned FirstReg, unsigned LastReg, const ISD::ArgFlagsTy &Flags, bool isLittle, const CCValAssign &VA) const argument
[all...] |
| H A D | MipsCallLowering.cpp | 179 if (!STI.isLittle())
276 if (!STI.isLittle())
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| H A D | MipsSEISelLowering.cpp | 608 bool IsLittleEndian = !Subtarget.isLittle();
852 EltSize, !Subtarget.isLittle()) ||
1187 if (!Subtarget.isLittle())
1210 if (!Subtarget.isLittle())
1655 !Subtarget.isLittle());
1691 !Subtarget.isLittle());
2461 !Subtarget.isLittle()) && SplatBitSize <= 64) {
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| H A D | MipsSEISelDAGToDAG.cpp | 526 MinSizeInBits, !Subtarget->isLittle()))
1098 !Subtarget->isLittle()))
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| H A D | MipsISelLowering.h | 583 const ISD::ArgFlagsTy &Flags, bool isLittle,
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| H A D | MipsExpandPseudo.cpp | 463 if (STI->isLittle()) {
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| H A D | MipsFastISel.cpp | 1249 if (ArgSize < 8 && !Subtarget->isLittle())
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| /freebsd-current/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMTargetMachine.h | 38 bool isLittle; member in class:llvm::ARMBaseTargetMachine
46 bool isLittle);
54 bool isLittleEndian() const { return isLittle; }
|
| H A D | ARMTargetMachine.cpp | 145 bool isLittle) {
149 if (isLittle)
224 CodeGenOptLevel OL, bool isLittle)
225 : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT,
229 TLOF(createTLOF(getTargetTriple())), isLittle(isLittle) {
311 I = std::make_unique<ARMSubtarget>(TargetTriple, CPU, FS, *this, isLittle,
143 computeDataLayout(const Triple &TT, StringRef CPU, const TargetOptions &Options, bool isLittle) argument
219 ARMBaseTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional<Reloc::Model> RM, std::optional<CodeModel::Model> CM, CodeGenOptLevel OL, bool isLittle) argument
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| H A D | ARMCallLowering.cpp | 160 bool IsLittle = MIRBuilder.getMF().getSubtarget<ARMSubtarget>().isLittle();
338 bool IsLittle = MIRBuilder.getMF().getSubtarget<ARMSubtarget>().isLittle();
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| H A D | ARMSubtarget.h | 469 bool isLittle() const { return IsLittle; } function in class:llvm::ARMSubtarget
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| H A D | ARMParallelDSP.cpp | 282 if (!ST->isLittle()) {
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| H A D | ARMISelLowering.cpp | 2232 if (!Subtarget->isLittle())
2249 if (!Subtarget->isLittle())
2320 unsigned id = Subtarget->isLittle() ? 0 : 1;
3195 bool isLittleEndian = Subtarget->isLittle();
4355 if (!Subtarget->isLittle())
14167 if (!Subtarget->isLittle())
15103 if (!Subtarget->isLittle() && BVSwap)
15121 if (!Subtarget->isLittle() && BVSwap)
15421 if (ST->isLittle())
15601 return MOV.getOperand(ST->isLittle()
[all...] |
| H A D | ARMExpandPseudoInsts.cpp | 1501 if (STI->isLittle()) {
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| H A D | ARMISelDAGToDAG.cpp | 1793 bool CanChangeType = Subtarget->isLittle() && !isa<MaskedLoadSDNode>(N);
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| /freebsd-current/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaTargetMachine.h | 31 bool JIT, bool isLittle);
|
| /freebsd-current/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64TargetMachine.h | 75 bool isLittle; member in class:llvm::AArch64TargetMachine
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| H A D | AArch64TargetMachine.cpp | 339 TLOF(createTLOF(getTargetTriple())), isLittle(LittleEndian) {
449 TargetTriple, CPU, TuneCPU, FS, *this, isLittle, MinSVEVectorSize,
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| /freebsd-current/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/ |
| H A D | MipsAsmParser.cpp | 743 bool isLittle() const { return IsLittleEndian; } function in class:__anon2523::MipsAsmParser
4476 if (isLittle())
4526 if (isLittle())
4567 if (isLittle())
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