Searched refs:i16 (Results 1 - 25 of 92) sorted by relevance

1234

/freebsd-current/cddl/contrib/opensolaris/cmd/dtrace/test/tst/common/aggs/
H A Dtst.signedkeyspos.d66 @i16["mouse", (short)-2] = sum(-2);
67 @i16["dog", (short)-2] = sum(-22);
68 @i16["cat", (short)-2] = sum(-222);
69 @i16["mouse", (short)-1] = sum(-1);
70 @i16["dog", (short)-1] = sum(-11);
71 @i16["cat", (short)-1] = sum(-111);
72 @i16["mouse", (short)0] = sum(0);
73 @i16["dog", (short)0] = sum(10);
74 @i16["cat", (short)0] = sum(100);
75 @i16["mous
[all...]
H A Dtst.signedkeys.d101 @i16[(short)-2] = sum(-2);
102 @i16[(short)-1] = sum(-1);
103 @i16[(short)0] = sum(0);
104 @i16[(short)1] = sum(1);
105 @i16[(short)2] = sum(2);
/freebsd-current/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kExpandPseudo.cpp84 return TII->ExpandMOVX_RR(MIB, MVT::i16, MVT::i8);
88 return TII->ExpandMOVX_RR(MIB, MVT::i32, MVT::i16);
91 return TII->ExpandMOVSZX_RR(MIB, true, MVT::i16, MVT::i8);
95 return TII->ExpandMOVSZX_RR(MIB, true, MVT::i32, MVT::i16);
98 return TII->ExpandMOVSZX_RR(MIB, false, MVT::i16, MVT::i8);
102 return TII->ExpandMOVSZX_RR(MIB, false, MVT::i32, MVT::i16);
105 return TII->ExpandMOVSZX_RM(MIB, true, TII->get(M68k::MOV8dj), MVT::i16,
112 MVT::i16);
115 return TII->ExpandMOVSZX_RM(MIB, false, TII->get(M68k::MOV8dj), MVT::i16,
122 MVT::i16);
[all...]
H A DM68kISelLowering.cpp59 addRegisterClass(MVT::i16, &M68k::XR16RegClass);
70 setTruncStoreAction(MVT::i64, MVT::i16, Expand);
72 setTruncStoreAction(MVT::i32, MVT::i16, Expand);
74 setTruncStoreAction(MVT::i16, MVT::i8, Expand);
77 setOperationAction({ISD::MUL, ISD::SDIV, ISD::UDIV}, MVT::i16, Legal);
88 setOperationAction(OP, MVT::i16, Legal);
94 setOperationAction(OP, MVT::i16, Expand);
99 setOperationAction(OP, MVT::i16, Custom);
107 for (auto VT : {MVT::i8, MVT::i16, MVT::i32}) {
115 for (auto VT : {MVT::i8, MVT::i16, MV
[all...]
/freebsd-current/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelDAGToDAG.cpp257 AM.Base.Reg = CurDAG->getRegister(MSP430::SR, MVT::i16);
267 MVT::i16, AM.Disp,
270 Disp = CurDAG->getTargetConstantPool(AM.CP, MVT::i16, AM.Alignment, AM.Disp,
273 Disp = CurDAG->getTargetExternalSymbol(AM.ES, MVT::i16, 0/*AM.SymbolFlags*/);
275 Disp = CurDAG->getTargetJumpTable(AM.JT, MVT::i16, 0/*AM.SymbolFlags*/);
280 Disp = CurDAG->getTargetConstant(AM.Disp, SDLoc(N), MVT::i16);
315 case MVT::i16:
339 case MVT::i16:
347 CurDAG->getMachineNode(Opcode, SDLoc(N), VT, MVT::i16, MVT::Other,
362 unsigned Opc = (VT == MVT::i16
[all...]
H A DMSP430ISelLowering.cpp50 addRegisterClass(MVT::i16, &MSP430::GR16RegClass);
62 setIndexedLoadAction(ISD::POST_INC, MVT::i16, Legal);
69 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Expand);
73 setTruncStoreAction(MVT::i16, MVT::i8, Expand);
78 setOperationAction(ISD::SRA, MVT::i16, Custom);
79 setOperationAction(ISD::SHL, MVT::i16, Custom);
80 setOperationAction(ISD::SRL, MVT::i16, Custom);
83 setOperationAction(ISD::ROTL, MVT::i16, Expand);
84 setOperationAction(ISD::ROTR, MVT::i16, Expand);
85 setOperationAction(ISD::GlobalAddress, MVT::i16, Custo
[all...]
/freebsd-current/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelDAGToDAG.cpp110 Disp = CurDAG->getTargetConstant(RHSC, dl, MVT::i16);
120 if (isUInt<6>(RHSC) && (VT == MVT::i8 || VT == MVT::i16)) {
157 case MVT::i16: {
196 // LPMWRdZPi: type == MVT::i16, offset == 2, Bank == 0.
198 // ELPMWRdZPi: type == MVT::i16, offset == 2, Bank > 0.
316 TFI, CurDAG->getTargetConstant(0, SDLoc(N), MVT::i16));
342 SDValue Offset = CurDAG->getTargetConstant(CST, DL, MVT::i16);
344 unsigned Opc = (VT == MVT::i16) ? AVR::STDWSPQRr : AVR::STDSPQRr;
382 Ptr = CurDAG->getCopyFromReg(Chain, DL, AVR::R31R30, MVT::i16,
390 CurDAG->getMachineNode(LPMOpc, DL, VT, MVT::i16, MV
[all...]
H A DAVRISelLowering.cpp41 addRegisterClass(MVT::i16, &AVR::DREGSRegClass);
52 setOperationAction(ISD::GlobalAddress, MVT::i16, Custom);
53 setOperationAction(ISD::BlockAddress, MVT::i16, Custom);
58 setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i16, Expand);
69 setTruncStoreAction(MVT::i16, MVT::i8, Expand);
88 setOperationAction(ISD::SRA, MVT::i16, Custom);
89 setOperationAction(ISD::SHL, MVT::i16, Custom);
90 setOperationAction(ISD::SRL, MVT::i16, Custom);
94 setOperationAction(ISD::SHL_PARTS, MVT::i16, Expand);
95 setOperationAction(ISD::SRA_PARTS, MVT::i16, Expan
[all...]
/freebsd-current/contrib/netbsd-tests/include/
H A Dt_inttypes.c41 int16_t i16 = 0; local
75 PRINT(PRId16, i16);
90 PRINT(PRIi16, i16);
166 SCAN(SCNd16, i16);
181 SCAN(SCNi16, i16);
/freebsd-current/cddl/contrib/opensolaris/cmd/dtrace/test/tst/common/typedef/
H A Dtst.TypedefDataAssign.d85 new_int16 i16;
/freebsd-current/contrib/netbsd-tests/ipf/
H A Dt_filter_parse.sh101 test_case i16 itest text ipf
127 atf_add_test_case i16
/freebsd-current/sys/dev/bhnd/nvram/
H A Dbhnd_nvram_data_spromvar.h164 int16_t i16[BHND_SPROM_ARRAY_MAXLEN]; member in union:bhnd_nvram_sprom_storage
H A Dbhnd_nvram_value.h231 int16_t i16[4]; /**< 16-bit signed data */ member in union:bhnd_nvram_val::__anon1925
/freebsd-current/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp288 if (VT == MVT::i8 || VT == MVT::i16 || VT == MVT::i32) {
478 case MVT::i16:
632 case MVT::i16:
840 if (SrcVT == MVT::i64 || SrcVT == MVT::i32 || SrcVT == MVT::i16 ||
913 case MVT::i16:
1078 if (SrcVT != MVT::i8 && SrcVT != MVT::i16 &&
1116 if (SrcVT == MVT::i8 || SrcVT == MVT::i16) {
1273 if (DestVT != MVT::i16 && DestVT != MVT::i8)
1513 if (RetVT == MVT::i8 || RetVT == MVT::i16 || RetVT == MVT::i32)
1533 } else if (RetVT == MVT::i8 || RetVT == MVT::i16 || RetV
[all...]
/freebsd-current/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp352 if (VT != MVT::i32 && VT != MVT::i16 && VT != MVT::i8 && VT != MVT::i1)
612 if (VT == MVT::i1 || VT == MVT::i8 || VT == MVT::i16)
624 if (VT == MVT::i8 || VT == MVT::i16)
762 case MVT::i16:
815 case MVT::i16:
1173 if (((ArgVT == MVT::i32) || (ArgVT == MVT::f32) || (ArgVT == MVT::i16) ||
1288 if (RetVT == MVT::i1 || RetVT == MVT::i8 || RetVT == MVT::i16)
1368 case MVT::i16:
1373 LLVM_DEBUG(dbgs() << ".. .. gave up (i8/i16 arg is not extended)\n");
1523 !(VT == MVT::i1 || VT == MVT::i8 || VT == MVT::i16))
[all...]
/freebsd-current/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMFastISel.cpp454 if (VT != MVT::i32 && VT != MVT::i16 && VT != MVT::i8 && VT != MVT::i1)
688 if (VT == MVT::i1 || VT == MVT::i8 || VT == MVT::i16)
806 case MVT::i16:
925 case MVT::i16:
1068 case MVT::i16:
1358 if (SrcVT == MVT::i32 || SrcVT == MVT::i16 || SrcVT == MVT::i8 ||
1394 case MVT::i16:
1421 // We have i1, i8, or i16, we need to either zero extend or sign extend.
1538 if (SrcVT != MVT::i32 && SrcVT != MVT::i16 && SrcVT != MVT::i8)
1545 if (SrcVT == MVT::i16 || SrcV
[all...]
H A DARMTargetTransformInfo.cpp519 {ISD::SIGN_EXTEND, MVT::i32, MVT::i16, 0},
520 {ISD::ZERO_EXTEND, MVT::i32, MVT::i16, 0},
523 {ISD::SIGN_EXTEND, MVT::i16, MVT::i8, 0},
524 {ISD::ZERO_EXTEND, MVT::i16, MVT::i8, 0},
527 {ISD::SIGN_EXTEND, MVT::i64, MVT::i16, 1},
528 {ISD::ZERO_EXTEND, MVT::i64, MVT::i16, 1},
748 { ISD::FP_TO_SINT, MVT::i16, MVT::f32, 2 },
749 { ISD::FP_TO_UINT, MVT::i16, MVT::f32, 2 },
750 { ISD::FP_TO_SINT, MVT::i16, MVT::f64, 2 },
751 { ISD::FP_TO_UINT, MVT::i16, MV
[all...]
/freebsd-current/sys/contrib/zstd/doc/educational_decoder/
H A Dzstd_decompress.c66 typedef int16_t i16; typedef
244 const i16 *const norm_freqs, const int num_symbs,
960 static const i16 SEQ_LITERAL_LENGTH_DEFAULT_DIST[36] = {
963 static const i16 SEQ_OFFSET_DEFAULT_DIST[29] = {
966 static const i16 SEQ_MATCH_LENGTH_DEFAULT_DIST[53] = {
1177 const i16 *const default_distributions[] = {SEQ_LITERAL_LENGTH_DEFAULT_DIST,
1193 const i16 *distribution = default_distributions[type];
2107 const i16 *const norm_freqs, const int num_symbs,
2230 i16 frequencies[FSE_MAX_SYMBS];
2253 const i16 prob
[all...]
/freebsd-current/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVTargetTransformInfo.cpp308 IndexVT = IndexVT.changeVectorElementType(MVT::i16);
682 {Intrinsic::bswap, MVT::i16, 3}, member in class:MVT
685 {Intrinsic::vp_bswap, MVT::i16, 3}, member in class:MVT
689 {Intrinsic::vp_fshl, MVT::i16, 7}, member in class:MVT
693 {Intrinsic::vp_fshr, MVT::i16, 7}, member in class:MVT
697 {Intrinsic::bitreverse, MVT::i16, 24}, member in class:MVT
701 {Intrinsic::vp_bitreverse, MVT::i16, 24}, member in class:MVT
705 {Intrinsic::ctpop, MVT::i16, 19}, member in class:MVT
709 {Intrinsic::vp_ctpop, MVT::i16, 19}, member in class:MVT
713 {Intrinsic::vp_ctlz, MVT::i16, 2 member in class:MVT
717 {Intrinsic::vp_cttz, MVT::i16, 23}, member in class:MVT
[all...]
/freebsd-current/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonSubtarget.h323 static MVT Types[] = {MVT::i8, MVT::i16, MVT::i32};
324 static MVT TypesV68[] = {MVT::i8, MVT::i16, MVT::i32, MVT::f16, MVT::f32};
/freebsd-current/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp326 case MVT::i16:
1008 /// simple value type such as i1, i8, and i16.
1018 if (VT == MVT::i1 || VT == MVT::i8 || VT == MVT::i16)
1179 case MVT::i16:
1478 case MVT::i16:
1652 if (RetVT >= MVT::i8 && RetVT <= MVT::i16) {
1676 case MVT::i16:
1697 if (RetVT >= MVT::i8 && RetVT <= MVT::i16 && ISDOpc != ISD::AND) {
1726 case MVT::i16:
1739 if (RetVT >= MVT::i8 && RetVT <= MVT::i16) {
[all...]
/freebsd-current/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyFastISel.cpp128 case MVT::i16:
454 case MVT::i16:
484 case MVT::i16:
667 case MVT::i16:
783 case MVT::i16:
934 case MVT::i16:
1207 case MVT::i16:
1267 case MVT::i16:
1353 case MVT::i16:
/freebsd-current/sys/contrib/openzfs/cmd/zed/
H A Dzed_event.c653 uint16_t i16; local
685 (void) nvpair_value_int16(nvp, (int16_t *)&i16);
686 _zed_event_add_var(eid, zsp, prefix, name, "%d", i16);
689 (void) nvpair_value_uint16(nvp, &i16);
690 _zed_event_add_var(eid, zsp, prefix, name, "%u", i16);
/freebsd-current/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp322 Segment = CurDAG->getRegister(0, MVT::i16);
1094 assert(N->getValueType(0).getVectorElementType() != MVT::i16 &&
1795 AM.Segment = CurDAG->getRegister(X86::GS, MVT::i16);
1798 AM.Segment = CurDAG->getRegister(X86::FS, MVT::i16);
2865 AM.Segment = CurDAG->getRegister(X86::GS, MVT::i16);
2867 AM.Segment = CurDAG->getRegister(X86::FS, MVT::i16);
2869 AM.Segment = CurDAG->getRegister(X86::SS, MVT::i16);
2907 AM.Segment = CurDAG->getRegister(X86::GS, MVT::i16);
2909 AM.Segment = CurDAG->getRegister(X86::FS, MVT::i16);
2911 AM.Segment = CurDAG->getRegister(X86::SS, MVT::i16);
[all...]
H A DX86SelectionDAGInfo.cpp96 AVT = MVT::i16;
193 return MVT::i16;

Completed in 601 milliseconds

1234