Searched refs:getMaxLaneMaskForVReg (Results 1 - 18 of 18) sorted by relevance

/freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/
H A DLiveIntervalCalc.cpp61 : MRI->getMaxLaneMaskForVReg(Reg);
65 LaneBitmask ClassMask = MRI->getMaxLaneMaskForVReg(Reg);
H A DDetectDeadLanes.cpp119 UsedLanes &= MRI->getMaxLaneMaskForVReg(MOReg);
264 DefinedLanes &= MRI->getMaxLaneMaskForVReg(Def.getReg());
315 MODefinedLanes = MRI->getMaxLaneMaskForVReg(MOReg);
330 return MRI->getMaxLaneMaskForVReg(Reg);
367 return MRI->getMaxLaneMaskForVReg(Reg);
H A DMachineInstrBundle.cpp322 UseMask |= MRI.getMaxLaneMaskForVReg(Reg);
H A DLiveRangeEdit.cpp142 : MRI.getMaxLaneMaskForVReg(MO.getReg());
H A DLiveIntervals.cpp779 : MRI->getMaxLaneMaskForVReg(Reg);
1021 : MRI.getMaxLaneMaskForVReg(Reg);
1038 : MRI.getMaxLaneMaskForVReg(Reg);
H A DMachineRegisterInfo.cpp497 LaneBitmask MachineRegisterInfo::getMaxLaneMaskForVReg(Register Reg) const { function in class:MachineRegisterInfo
H A DLiveInterval.cpp970 LaneBitmask VRegMask = MRI.getMaxLaneMaskForVReg(reg());
1079 LaneBitmask MaxMask = MRI != nullptr ? MRI->getMaxLaneMaskForVReg(reg())
H A DRegisterCoalescer.cpp981 LaneBitmask Mask = MRI->getMaxLaneMaskForVReg(IntA.reg());
984 LaneBitmask Mask = MRI->getMaxLaneMaskForVReg(IntB.reg());
1522 LaneBitmask MaxMask = MRI->getMaxLaneMaskForVReg(DstReg);
1874 LaneBitmask FullMask = MRI->getMaxLaneMaskForVReg(DstInt->reg());
4271 LaneBitmask MaxMask = MRI->getMaxLaneMaskForVReg(Reg);
H A DSplitKit.cpp462 LM = MRI.getMaxLaneMaskForVReg(R);
553 if (LaneMask.all() || LaneMask == MRI.getMaxLaneMaskForVReg(FromReg)) {
1412 : MRI.getMaxLaneMaskForVReg(Reg);
H A DRegisterPressure.cpp434 Result = TrackLaneMasks ? MRI.getMaxLaneMaskForVReg(RegUnit)
556 : MRI.getMaxLaneMaskForVReg(Reg);
H A DMachineVerifier.cpp2567 : MRI->getMaxLaneMaskForVReg(Reg);
2665 : MRI->getMaxLaneMaskForVReg(Reg);
3426 LaneBitmask MaxMask = MRI->getMaxLaneMaskForVReg(Reg);
H A DRegAllocGreedy.cpp1367 return MRI.getMaxLaneMaskForVReg(Reg);
/freebsd-current/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNRegPressure.cpp165 MRI.getMaxLaneMaskForVReg(MO.getReg()) :
189 UseMask = MRI.getMaxLaneMaskForVReg(Reg);
219 assert(LiveMask == (LiveMask & MRI.getMaxLaneMaskForVReg(LI.reg())));
222 LiveMask = MRI.getMaxLaneMaskForVReg(LI.reg());
532 LaneBitmask RegMask = MRI.getMaxLaneMaskForVReg(Reg);
H A DGCNRegPressure.h292 MRI.getMaxLaneMaskForVReg(Reg);
H A DSIWholeQuadMode.cpp328 : (Reg.isVirtual() ? MRI->getMaxLaneMaskForVReg(Reg)
H A DSIRegisterInfo.cpp3160 : MRI.getMaxLaneMaskForVReg(Reg);
/freebsd-current/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonExpandCondsets.cpp294 : MRI->getMaxLaneMaskForVReg(Reg);
365 KillAt(I->end, MRI->getMaxLaneMaskForVReg(Reg));
539 updateDeadsInRange(Reg, MRI->getMaxLaneMaskForVReg(Reg), LI);
/freebsd-current/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMachineRegisterInfo.h1019 LaneBitmask getMaxLaneMaskForVReg(Register Reg) const;

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