Searched refs:data0 (Results 1 - 24 of 24) sorted by relevance

/freebsd-current/contrib/expat/tests/
H A Dstructdata.h44 int data0; member in struct:__anon35
57 void StructData_AddItem(StructData *storage, const XML_Char *s, int data0,
H A Dstructdata.c80 StructData_AddItem(StructData *storage, const XML_Char *s, int data0, int data1, argument
98 entry->data0 = data0;
132 if (got->data0 != want->data0 || got->data1 != want->data1
137 got->str, want->data0, want->data1, want->data2, got->data0,
/freebsd-current/contrib/xz/src/liblzma/check/
H A Dcrc64_fast.c289 // Get the first 1-16 bytes into data0. If loading less than 16 bytes,
292 const __m128i data0 = _mm_blendv_epi8(_mm_load_si128(aligned_buf), local
326 // in data0. Copy the input bytes to v3. If there
331 MASK_L(data0, mask_end, v3);
334 // are in data0.
337 // Collect the 2-16 input bytes from data0 and data1
342 MASK_H(data0, mask_end, v2);
354 v0 = _mm_xor_si128(v0, data0);
/freebsd-current/sys/dev/mxge/
H A Dif_mxge.c476 * results are returned in cmd.data0. The upper 16
484 cmd.data0 = MXGE_LOWPART_TO_U32(dmatest_bus);
492 sc->read_dma = ((cmd.data0>>16) * len * 2) /
493 (cmd.data0 & 0xffff);
494 cmd.data0 = MXGE_LOWPART_TO_U32(dmatest_bus);
502 sc->write_dma = ((cmd.data0>>16) * len * 2) /
503 (cmd.data0 & 0xffff);
505 cmd.data0 = MXGE_LOWPART_TO_U32(dmatest_bus);
513 sc->read_write_dma = ((cmd.data0>>16) * len * 2 * 2) /
514 (cmd.data0
[all...]
H A Dmxge_mcp.h83 uint32_t data0; /* will be low portion if data > 32 bits */ member in struct:mcp_cmd
191 /* data0 = LSW of the host address
206 /* data0 = slice number if multiple slices are used */
256 data0,data1 = DMA address
267 data0,MSH(data1) = multicast group address */
272 data0,MSH(data1) = multicast group address */
277 /* data0, data1 = bus addr,
294 /* data0 = number of big buffers to use. It must be 0 or a power of 2.
305 /* data0 = number of slices n (0, 1, ..., n-1) to enable
321 /* data0, data
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H A Dif_mxge_var.h109 uint32_t data0; member in struct:__anon3692
/freebsd-current/sys/dev/etherswitch/micrel/
H A Dksz8995ma.c626 int data0, data1, data2; local
636 data0 = ksz8995ma_readreg(dev, KSZ8995MA_PC1_BASE +
638 vg->es_member_ports = data0 & 0x1f;
650 data0 = ksz8995ma_readreg(dev, KSZ8995MA_IDR0);
651 vlantab = data2 << 16 | data1 << 8 | data0;
670 int data0; local
675 data0 = ksz8995ma_readreg(dev, KSZ8995MA_PC1_BASE +
679 (data0 & 0xe0) | (vg->es_member_ports & 0x1f));
/freebsd-current/sys/fs/tarfs/
H A Dtarfs.h165 u_short data0; /* force alignment */ member in struct:tarfs_fid
/freebsd-current/sys/dev/mpt/
H A Dmpt_cam.c2286 uint32_t data0, data1; local
2288 data0 = le32toh(msg->Data[0]);
2293 (data0 >> 8) & 0xff, data0 & 0xff);
2299 (data0 >> 8) & 0xff);
2320 mpt_prt(mpt, "Rescan Port: %d\n", (data0 >> 8) & 0xff);
2352 ((data0 & 0xff) == 0)? "Failed" : "Active");
2356 switch ((data0 >> 16) & 0xff) {
2362 (data0 >> 8) & 0xff,
2363 (data0 )
[all...]
/freebsd-current/sys/contrib/dev/iwlwifi/mvm/
H A Drxmq.c1779 __le32 data0 = phy_data->d0; local
1793 usig->common |= LE32_DEC_ENC(data0,
1796 usig->common |= LE32_DEC_ENC(data0,
1813 LE32_DEC_ENC(data0, IWL_RX_PHY_DATA0_EHT_VALIDATE,
1818 eht->data[0] |= LE32_DEC_ENC(data0,
1824 eht->data[8] |= LE32_DEC_ENC(data0, IWL_RX_PHY_DATA0_EHT_PS160,
1844 usig->common |= LE32_DEC_ENC(data0, IWL_RX_PHY_DATA0_EHT_TXOP_DUR_MASK,
1851 eht->data[0] |= LE32_DEC_ENC(data0, IWL_RX_PHY_DATA0_EHT_LDPC_EXT_SYM,
1855 eht->data[0] |= LE32_DEC_ENC(data0, IWL_RX_PHY_DATA0_EHT_PRE_FEC_PAD_MASK,
1859 eht->data[0] |= LE32_DEC_ENC(data0, IWL_RX_PHY_DATA0_EHT_PE_DISAMBI
[all...]
/freebsd-current/sys/dev/rtsx/
H A Drtsx.c1358 uint8_t data0, data1, data2, data3, rwctl; local
1373 RTSX_READ(sc, RTSX_CFGDATA0, &data0);
1378 *val = (data3 << 24) | (data2 << 16) | (data1 << 8) | data0;
1414 uint8_t data0, data1, rwctl; local
1427 RTSX_READ(sc, RTSX_PHY_DATA0, &data0);
1429 *val = data1 << 8 | data0;
/freebsd-current/sys/dev/ixl/
H A Di40e_prototype.h604 u32 *cmd_status, u32 *data0, u32 *data1,
H A Di40e_common.c5953 cmd_resp->data0 = CPU_TO_LE32(reg_val0);
6033 *reg_val0 = LE32_TO_CPU(cmd_resp->data0);
7415 * @data0: pointer to memory for first 4 bytes of data returned by DNL script
7423 u32 *cmd_status, u32 *data0, u32 *data1,
7432 if (!cmd_status || !data0 || !data1) {
7448 *data0 = LE32_TO_CPU(cmd->params.resp.data0);
7422 i40e_aq_run_phy_activity(struct i40e_hw *hw, u16 activity_id, u32 dnl_opcode, u32 *cmd_status, u32 *data0, u32 *data1, struct i40e_asq_cmd_details *cmd_details) argument
H A Di40e_adminq_cmd.h2340 __le32 data0; member in struct:i40e_aqc_run_phy_activity::__anon2914::__anon2916
2533 __le32 data0; member in struct:i40e_aqc_alternate_write
/freebsd-current/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIInsertWaitcnts.cpp793 if (AMDGPU::hasNamedOperand(Inst.getOpcode(), AMDGPU::OpName::data0)) {
796 AMDGPU::getNamedOperandIdx(Inst.getOpcode(), AMDGPU::OpName::data0),
H A DSILoadStoreOptimizer.cpp1111 if (const auto *Src = TII->getNamedOperand(MI, AMDGPU::OpName::data0)) {
1299 TII->getNamedOperand(*CI.I, AMDGPU::OpName::data0);
1301 TII->getNamedOperand(*Paired.I, AMDGPU::OpName::data0);
1341 .add(*Data0) // data0
H A DSIInstrInfo.cpp388 DataOpIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::data0);
412 int Data0Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::data0);
424 DataOpIdx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::data0);
5126 uint16_t DataNameIdx = isDS(Opcode) ? AMDGPU::OpName::data0
5174 if (!isAlignedReg(AMDGPU::OpName::data0)) {
5475 (TID.TSFlags & SIInstrFlags::DS) ? AMDGPU::OpName::data0
5677 isDS(Opc) ? AMDGPU::OpName::data0 : AMDGPU::OpName::vdata);
H A DAMDGPUInstructionSelector.cpp1745 TII.enforceOperandRCAlignment(*MIB, AMDGPU::OpName::data0);
H A DSIISelLowering.cpp4177 if (MachineOperand *Src = TII->getNamedOperand(MI, AMDGPU::OpName::data0))
5174 TII->enforceOperandRCAlignment(MI, AMDGPU::OpName::data0);
/freebsd-current/contrib/wpa/src/crypto/
H A Dcrypto_module_tests.c1164 static const u8 data0[] = "Hi There"; variable
1357 if (sha1_prf(key0, sizeof(key0), "prefix", data0, sizeof(data0) - 1,
/freebsd-current/contrib/ofed/libcxgb4/
H A Dt4fw_api.h832 __be64 data0; member in struct:fw_ldst_cmd::fw_ldst::fw_ldst_func
/freebsd-current/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp378 // If a DS instruction has both data0 and data1 their register classes
382 uint16_t DataNameIdx = (TSFlags & SIInstrFlags::DS) ? AMDGPU::OpName::data0
/freebsd-current/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp4564 uint16_t DataNameIdx = (TSFlags & SIInstrFlags::DS) ? AMDGPU::OpName::data0
4715 AMDGPU::getNamedOperandIdx(Inst.getOpcode(), AMDGPU::OpName::data0);
/freebsd-current/sys/dev/cxgbe/firmware/
H A Dt4fw_interface.h4340 __be64 data0; member in struct:fw_ldst_cmd::fw_ldst::fw_ldst_func

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