/freebsd-current/sys/dev/ath/ath_hal/ah_regdomain/ |
H A D | ah_rd_domains.h | 33 #define W1(_a) \ macro 35 #define BM1(_fa) { W0(_fa), W1(_fa) } 36 #define BM2(_fa, _fb) { W0(_fa) | W0(_fb), W1(_fa) | W1(_fb) } 38 { W0(_fa) | W0(_fb) | W0(_fc), W1(_fa) | W1(_fb) | W1(_fc) } 41 W1(_fa) | W1(_fb) | W1(_f [all...] |
/freebsd-current/contrib/llvm-project/llvm/lib/Support/ |
H A D | BinaryStreamWriter.cpp | 90 BinaryStreamWriter W1{First}; 92 return std::make_pair(W1, W2);
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H A D | BinaryStreamReader.cpp | 175 BinaryStreamReader W1{First}; 177 return std::make_pair(W1, W2);
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/freebsd-current/crypto/openssl/crypto/sha/asm/ |
H A D | sha512-armv8.pl | 365 my ($W0,$W1)=("v16.4s","v17.4s"); 394 ld1.32 {$W1},[$Ktbl],#16 402 ($W0,$W1)=($W1,$W0); push(@MSG,shift(@MSG)); 405 ld1.32 {$W1},[$Ktbl],#16 412 add.i32 $W1,$W1,@MSG[1] 414 sha256h $ABCD,$EFGH,$W1 415 sha256h2 $EFGH,$abcd,$W1 417 ld1.32 {$W1},[ [all...] |
H A D | sha1-armv8.pl | 250 my ($W0,$W1)=("v20.4s","v21.4s"); 279 add.i32 $W1,@Kxx[0],@MSG[1] 290 sha1$f $ABCD,$E1,$W1 291 add.i32 $W1,@Kxx[$j],@MSG[3] 297 ($E0,$E1)=($E1,$E0); ($W0,$W1)=($W1,$W0); 302 sha1p $ABCD,$E1,$W1 303 add.i32 $W1,@Kxx[$j],@MSG[3] 309 sha1p $ABCD,$E1,$W1
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H A D | sha256-armv4.pl | 608 my ($W0,$W1,$ABCD_SAVE,$EFGH_SAVE)=map("q$_",(12..15)); 645 vld1.32 {$W1},[$Ktbl]! 653 ($W0,$W1)=($W1,$W0); push(@MSG,shift(@MSG)); 656 vld1.32 {$W1},[$Ktbl]! 663 vadd.i32 $W1,$W1,@MSG[1] 665 sha256h $ABCD,$EFGH,$W1 666 sha256h2 $EFGH,$abcd,$W1 668 vld1.32 {$W1},[ [all...] |
H A D | sha1-armv4-large.pl | 624 my ($W0,$W1,$ABCD_SAVE)=map("q$_",(12..14)); 663 vadd.i32 $W1,@Kxx[0],@MSG[1] 674 sha1$f $ABCD,$E1,$W1 675 vadd.i32 $W1,@Kxx[$j],@MSG[3] 681 ($E0,$E1)=($E1,$E0); ($W0,$W1)=($W1,$W0); 686 sha1p $ABCD,$E1,$W1 687 vadd.i32 $W1,@Kxx[$j],@MSG[3] 693 sha1p $ABCD,$E1,$W1
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonBitTracker.cpp | 369 uint16_t W1 = getRegBitWidth(Reg[1]); 370 assert(W0 == 64 && W1 == 32); 371 RegisterCell CW = RegisterCell(W0).insert(rc(1), BT::BitMask(0, W1-1)); 372 RegisterCell RC = eADD(eSXT(CW, W1), rc(2)); 703 uint16_t W1 = getRegBitWidth(Reg[1]); 707 RegisterCell RZ = RegisterCell(W0).fill(BX, W1, Zero) 708 .fill(W1+(W1-BX), W0, Zero); 709 RegisterCell BF1 = eXTR(rc(1), 0, BX), BF2 = eXTR(rc(1), BX, W1); 710 RegisterCell RC = eINS(eINS(RZ, BF1, 0), BF2, W1); [all...] |
H A D | HexagonGenInsert.cpp | 341 uint16_t W1 = RC1.width(), W2 = RC2.width(); local 342 for (uint16_t i = 0, w = std::min(W1, W2); i < w; ++i) { 348 if (W1 != W2) 349 return W1 < W2; 359 uint16_t W1 = RC1.width(), W2 = RC2.width(); local 367 if (W1 <= Bit1)
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H A D | BitTracker.cpp | 697 uint16_t W1 = A1.width(), W2 = A2.width(); 698 (void)W1; 699 assert(AtN < W1 && AtN+W2 <= W1);
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H A D | HexagonRegisterInfo.cpp | 86 W0, W1, W2, W3, W4, W5, W6, W7, W8, W9, W10, W11, W12, W13, W14, W15, 0
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H A D | HexagonConstPropagation.cpp | 1215 unsigned W1 = A1.getBitWidth(); local 1217 unsigned MaxW = (W1 >= W2) ? W1 : W2;
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H A D | HexagonISelLoweringHVX.cpp | 1289 SDValue W1 = extractHvxElementReg(WordVec, W1Idx, dl, MVT::i32, DAG); 1290 SDValue WW = getCombine(W1, W0, dl, MVT::i64, DAG); 1351 SDValue W1 = DAG.getNode(HexagonISD::VEXTRACTW, dl, MVT::i32, 1353 SDValue Vec64 = getCombine(W1, W0, dl, MVT::v8i8, DAG);
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H A D | HexagonISelLowering.cpp | 3021 SDValue W0 = Words[IdxW][i], W1 = Words[IdxW][i+1]; variable 3022 // Insert W1 into W0 right next to the significant bits of W0. 3024 {W0, W1, WidthV, WidthV});
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/BPF/Disassembler/ |
H A D | BPFDisassembler.cpp | 112 BPF::W0, BPF::W1, BPF::W2, BPF::W3, BPF::W4, BPF::W5,
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/freebsd-current/contrib/llvm-project/clang/lib/Headers/ |
H A D | hexagon_types.h | 659 int W1(void) { function in class:HEXAGON_Vect64C 756 HEXAGON_Vect64C W1(int w) { function in class:HEXAGON_Vect64C 1886 int W1(void) { function in class:Q6Vect64C 1983 Q6Vect64C W1(int w) { function in class:Q6Vect64C
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/AArch64/Utils/ |
H A D | AArch64BaseInfo.h | 33 case AArch64::X1: return AArch64::W1; 73 case AArch64::W1: return AArch64::X1;
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/freebsd-current/contrib/wpa/src/tls/ |
H A D | libtommath.c | 3262 mp_word W1; local 3273 W1 = 0; 3307 _W = _W + _W + W1; 3318 W1 = _W >> ((mp_word)DIGIT_BIT);
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/freebsd-current/sys/powerpc/powerpc/ |
H A D | support.S | 209 #define W1 1 define
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/ |
H A D | AArch64MCTargetDesc.cpp | 73 {codeview::RegisterId::ARM64_W1, AArch64::W1},
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/Hexagon/Disassembler/ |
H A D | HexagonDisassembler.cpp | 627 Hexagon::W0, Hexagon::WR0, Hexagon::W1, Hexagon::WR1, Hexagon::W2,
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/freebsd-current/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64AsmPrinter.cpp | 1667 Ldr.addOperand(MCOperand::createReg(AArch64::W1));
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H A D | AArch64FastISel.cpp | 2954 { AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4,
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/freebsd-current/contrib/netbsd-tests/usr.bin/netpgpverify/ |
H A D | t_netpgpverify.sh | 1557 sBRg1DgVTRHd/Nomk14O7noFi0NH/W1+vXD5MEGX31LiEgriWpZm9Oqpnlkeb1ry 1651 1q8YC1cgL1qb3fSit0/kvR871X6M7HuiIqH8Yn3Hr1CZFM+JbbifF3YQ8vpG2+W1
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/freebsd-current/sys/contrib/dev/rtw89/ |
H A D | coex.c | 381 /* TDMA Fix slot-0: W1:B1 = 30:30 */ 384 /* TDMA Fix slot-1: W1:B1 = 50:50 */ 387 /* TDMA Fix slot-2: W1:B1 = 20:30 */ 390 /* TDMA Fix slot-3: W1:B1 = 40:10 */ 393 /* TDMA Fix slot-4: W1:B1 = 70:10 */ 396 /* TDMA Fix slot-5: W1:B1 = 20:60 */ 399 /* TDMA Fix slot-6: W1:B1 = 30:60 */ 402 /* TDMA Fix slot-7: W1:B1 = 20:80 */ 405 /* TDMA Fix slot-8: W1:B1 = user-define */ 408 /* TDMA Fix slot-9: W1 [all...] |