Searched refs:SrcInst (Results 1 - 10 of 10) sorted by relevance

/freebsd-current/contrib/llvm-project/llvm/include/llvm/Transforms/Utils/
H A DVNCoercion.h88 Value *getMemInstValueForLoad(MemIntrinsic *SrcInst, unsigned Offset,
93 Constant *getConstantMemInstValueForLoad(MemIntrinsic *SrcInst, unsigned Offset,
/freebsd-current/contrib/llvm-project/llvm/lib/Transforms/Utils/
H A DVNCoercion.cpp360 Value *getMemInstValueForLoad(MemIntrinsic *SrcInst, unsigned Offset, argument
369 if (MemSetInst *MSI = dyn_cast<MemSetInst>(SrcInst)) {
400 MemTransferInst *MTI = cast<MemTransferInst>(SrcInst);
407 Constant *getConstantMemInstValueForLoad(MemIntrinsic *SrcInst, unsigned Offset, argument
414 if (MemSetInst *MSI = dyn_cast<MemSetInst>(SrcInst)) {
424 MemTransferInst *MTI = cast<MemTransferInst>(SrcInst);
/freebsd-current/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonSubtarget.cpp445 MachineInstr *SrcInst = Src->getInstr();
452 if (QII->canExecuteInBundle(*SrcInst, *DstInst) &&
486 InstrInfo.getOperandLatency(&InstrItins, *SrcInst, 0, *DDst, UseIdx);
505 if (EnableDotCurSched && QII->isToBeScheduledASAP(*SrcInst, *DstInst) &&
512 Latency = updateLatency(*SrcInst, *DstInst, IsArtificial, Latency);
542 int HexagonSubtarget::updateLatency(MachineInstr &SrcInst, argument
552 if (QII.isHVXVec(SrcInst) || useBSBScheduling())
638 MachineInstr &SrcInst = *Src->getInstr(); local
645 if (SrcInst.isPHI() || DstInst.isPHI())
648 if (!TII->isToBeScheduledASAP(SrcInst, DstIns
[all...]
H A DHexagonSubtarget.h348 int updateLatency(MachineInstr &SrcInst, MachineInstr &DstInst,
/freebsd-current/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMIRYamlMapping.h518 unsigned SrcInst; member in struct:llvm::yaml::DebugValueSubstitution
525 return std::tie(SrcInst, SrcOp, DstInst, DstOp) ==
526 std::tie(Other.SrcInst, Other.SrcOp, Other.DstInst, Other.DstOp);
532 YamlIO.mapRequired("srcinst", Sub.SrcInst);
/freebsd-current/contrib/llvm-project/llvm/lib/IR/
H A DInstruction.cpp1177 void Instruction::copyMetadata(const Instruction &SrcInst,
1179 if (!SrcInst.hasMetadata())
1189 SrcInst.getAllMetadataOtherThanDebugLoc(TheMDs);
1195 setDebugLoc(SrcInst.getDebugLoc());
/freebsd-current/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstCombineIntrinsic.cpp1066 Instruction *SrcInst = dyn_cast<Instruction>(Src);
1067 if (SrcInst && SrcInst->getParent() != II.getParent())
/freebsd-current/contrib/llvm-project/llvm/include/llvm/IR/
H A DInstruction.h381 /// Copy metadata from \p SrcInst to this instruction. \p WL, if not empty,
384 void copyMetadata(const Instruction &SrcInst,
/freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/MIRParser/
H A DMIRParser.cpp452 MF.makeDebugValueSubstitution({Sub.SrcInst, Sub.SrcOp},
/freebsd-current/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DSLPVectorizer.cpp12865 Instruction *SrcInst = BundleMember->Inst;
12866 assert(SrcInst->mayReadOrWriteMemory() &&
12868 MemoryLocation SrcLoc = getLocation(SrcInst);
12886 SLP->isAliased(SrcLoc, SrcInst, DepDest->Inst)))) {

Completed in 249 milliseconds