Searched refs:SGPRSpill (Results 1 - 12 of 12) sorted by relevance

/freebsd-current/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIProgramInfo.h67 unsigned SGPRSpill = 0; member in struct:llvm::SIProgramInfo
H A DSILowerSGPRSpills.cpp357 assert(MFI.getStackID(FI) == TargetStackID::SGPRSpill);
H A DSIFrameLowering.cpp95 TargetStackID::SGPRSpill);
269 assert(MFI.getStackID(FI) == TargetStackID::SGPRSpill);
315 assert(MFI.getStackID(FI) == TargetStackID::SGPRSpill);
525 // Note SGPRSpill stack IDs should only be used for SGPR spilling to VGPRs, not
870 case TargetStackID::SGPRSpill:
1308 MFI.getStackID(I) == TargetStackID::SGPRSpill &&
H A DSIInstrInfo.h720 return MI.getDesc().TSFlags & SIInstrFlags::SGPRSpill;
724 return get(Opcode).TSFlags & SIInstrFlags::SGPRSpill;
729 (SIInstrFlags::SGPRSpill | SIInstrFlags::VGPRSpill);
H A DAMDGPUAsmPrinter.cpp883 ProgInfo.SGPRSpill = MFI->getNumSpilledSGPRs();
1311 EmitResourceUsageRemark("SGPRSpill", "SGPRs Spill",
1312 CurrentProgramInfo.SGPRSpill);
H A DSIDefines.h92 SGPRSpill = 1 << 27,
H A DSIMachineFunctionInfo.cpp535 if (MFI.getStackID(I) == TargetStackID::SGPRSpill) {
H A DSIRegisterInfo.cpp1724 assert(FrameInfo.getStackID(Index) != TargetStackID::SGPRSpill);
H A DSIInstrInfo.cpp1758 FrameInfo.setStackID(FrameIndex, TargetStackID::SGPRSpill);
1977 FrameInfo.setStackID(FrameIndex, TargetStackID::SGPRSpill);
/freebsd-current/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetFrameLowering.h30 SGPRSpill = 1, enumerator in enum:llvm::TargetStackID::Value
H A DMIRYamlMapping.h376 IO.enumCase(ID, "sgpr-spill", TargetStackID::SGPRSpill);
/freebsd-current/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVFrameLowering.cpp1551 case TargetStackID::SGPRSpill:

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