| /freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ResourcePriorityQueue.cpp | 56 RegPressure.resize(NumRC);
58 std::fill(RegPressure.begin(), RegPressure.end(), 0);
364 if ((RegPressure[RC->getID()] +
366 (RegPressure[RC->getID()] +
479 RegPressure[RC->getID()] += numberRCValSuccInSU(SU, RC->getID());
490 if (RegPressure[RC->getID()] >
492 RegPressure[RC->getID()] -= numberRCValPredInSU(SU, RC->getID());
493 else RegPressure[RC->getID()] = 0;
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| H A D | ScheduleDAGRRList.cpp | 1751 /// RegPressure - Tracking current reg pressure per register class.
1752 std::vector<unsigned> RegPressure;
1771 RegPressure.resize(NumRC);
1773 std::fill(RegPressure.begin(), RegPressure.end(), 0);
1796 std::fill(RegPressure.begin(), RegPressure.end(), 0);
2085 unsigned RP = RegPressure[Id];
2111 if ((RegPressure[RCId] + Cost) >= RegLimit[RCId])
2130 if (RegPressure[RCI
[all...] |
| H A D | SelectionDAGISel.cpp | 296 if (TLI->getSchedulingPreference() == Sched::RegPressure)
|
| /freebsd-current/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | ResourcePriorityQueue.h | 50 /// RegPressure - Tracking current reg pressure per register class.
52 std::vector<unsigned> RegPressure; member in class:llvm::ResourcePriorityQueue
|
| H A D | MachineScheduler.h | 320 /// Return true if this DAG supports VReg liveness and RegPressure.
420 IntervalPressure RegPressure; member in class:llvm::ScheduleDAGMILive
440 RegClassInfo(C->RegClassInfo), RPTracker(RegPressure),
445 /// Return true if this DAG supports VReg liveness and RegPressure.
460 const IntervalPressure &getRegPressure() const { return RegPressure; }
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| H A D | TargetLowering.h | 102 RegPressure, // Scheduling for lowest register pressure. enumerator in enum:llvm::Sched::Preference
|
| /freebsd-current/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineLICM.cpp | 159 SmallVector<unsigned, 8> RegPressure; member in class:__anon1901::MachineLICMBase
202 RegPressure.clear();
367 RegPressure.resize(NumRPS);
368 std::fill(RegPressure.begin(), RegPressure.end(), 0);
699 BackTrace.push_back(RegPressure);
837 std::fill(RegPressure.begin(), RegPressure.end(), 0);
860 if (static_cast<int>(RegPressure[Class]) < -RPIdAndCost.second)
861 RegPressure[Clas
[all...] |
| /freebsd-current/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRISelLowering.cpp | 48 setSchedulingPreference(Sched::RegPressure);
|
| /freebsd-current/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblyISelLowering.cpp | 56 setSchedulingPreference(Sched::RegPressure);
|
| /freebsd-current/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 1607 setSchedulingPreference(Sched::RegPressure);
1966 return Sched::RegPressure;
1977 return Sched::RegPressure;
1985 return Sched::RegPressure;
1990 return Sched::RegPressure;
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| /freebsd-current/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 423 setSchedulingPreference(Sched::RegPressure);
|
| /freebsd-current/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelLowering.cpp | 532 setSchedulingPreference(Sched::RegPressure);
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| H A D | SIISelLowering.cpp | 946 setSchedulingPreference(Sched::RegPressure);
|
| /freebsd-current/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZISelLowering.cpp | 130 setSchedulingPreference(Sched::RegPressure);
|
| /freebsd-current/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 107 setSchedulingPreference(Sched::RegPressure);
[all...] |