Searched refs:AMDGPUTargetLowering (Results 1 - 11 of 11) sorted by relevance

/freebsd-current/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600TargetTransformInfo.h26 class AMDGPUTargetLowering;
35 const AMDGPUTargetLowering *TLI;
42 const AMDGPUTargetLowering *getTLI() const { return TLI; }
H A DAMDGPUCallLowering.h21 class AMDGPUTargetLowering;
41 AMDGPUCallLowering(const AMDGPUTargetLowering &TLI);
H A DAMDGPUISelLowering.cpp40 EVT AMDGPUTargetLowering::getEquivalentMemType(LLVMContext &Ctx, EVT VT) {
49 unsigned AMDGPUTargetLowering::numBitsUnsigned(SDValue Op, SelectionDAG &DAG) {
53 unsigned AMDGPUTargetLowering::numBitsSigned(SDValue Op, SelectionDAG &DAG) {
59 AMDGPUTargetLowering::AMDGPUTargetLowering(const TargetMachine &TM, function in class:AMDGPUTargetLowering
583 bool AMDGPUTargetLowering::mayIgnoreSignedZero(SDValue Op) const {
710 bool AMDGPUTargetLowering::allUsesHaveSourceMods(const SDNode *N,
736 EVT AMDGPUTargetLowering::getTypeForExtReturn(LLVMContext &Context, EVT VT,
747 MVT AMDGPUTargetLowering::getVectorIdxTy(const DataLayout &) const {
751 bool AMDGPUTargetLowering
[all...]
H A DR600ISelLowering.h24 class R600TargetLowering final : public AMDGPUTargetLowering {
H A DAMDGPUISelLowering.h27 class AMDGPUTargetLowering : public TargetLowering { class in namespace:llvm
180 AMDGPUTargetLowering(const TargetMachine &TM, const AMDGPUSubtarget &STI);
H A DR600ISelLowering.cpp32 : AMDGPUTargetLowering(TM, STI), Subtarget(&STI), Gen(STI.getGeneration()) {
178 // FIXME: This was moved from AMDGPUTargetLowering, I'm not sure if we
238 return AMDGPUTargetLowering::EmitInstrWithCustomInserter(MI, BB);
400 default: return AMDGPUTargetLowering::LowerOperation(Op, DAG);
584 AMDGPUTargetLowering::ReplaceNodeResults(N, Results, DAG);
673 return AMDGPUTargetLowering::LowerGlobalAddress(MFI, Op, DAG);
1838 if (SDValue Ret = AMDGPUTargetLowering::PerformDAGCombine(N, DCI))
1942 return AMDGPUTargetLowering::PerformDAGCombine(N, DCI);
2189 return AMDGPUTargetLowering::shouldExpandAtomicRMWInIR(RMW);
H A DSIISelLowering.h31 class SITargetLowering final : public AMDGPUTargetLowering {
H A DAMDGPUISelDAGToDAG.cpp1604 N = AMDGPUTargetLowering::stripBitcast(SDValue(N,0)).getNode();
1610 dyn_cast<MemSDNode>(AMDGPUTargetLowering::stripBitcast(V)))
3544 const AMDGPUTargetLowering& Lowering =
3545 *static_cast<const AMDGPUTargetLowering*>(getTargetLowering());
H A DSIISelLowering.cpp86 : AMDGPUTargetLowering(TM, STI),
1138 return AMDGPUTargetLowering::getPointerTy(DL, AS);
1150 return AMDGPUTargetLowering::getPointerMemTy(DL, AS);
3087 return AMDGPUTargetLowering::LowerReturn(Chain, CallConv, isVarArg, Outs,
3923 return AMDGPUTargetLowering::LowerDYNAMIC_STACKALLOC(Op, DAG);
5297 return AMDGPUTargetLowering::EmitInstrWithCustomInserter(MI, BB);
5524 default: return AMDGPUTargetLowering::LowerOperation(Op, DAG);
6058 AMDGPUTargetLowering::ReplaceNodeResults(N, Results, DAG);
7199 return AMDGPUTargetLowering::LowerGlobalAddress(MFI, Op, DAG);
12323 return AMDGPUTargetLowering
[all...]
H A DAMDGPULegalizerInfo.cpp2144 AMDGPUTargetLowering::ImplicitParameter Param =
2145 AS == AMDGPUAS::LOCAL_ADDRESS ? AMDGPUTargetLowering::SHARED_BASE
2146 : AMDGPUTargetLowering::PRIVATE_BASE;
5340 B.getMF(), AMDGPUTargetLowering::FIRST_IMPLICIT);
6622 AMDGPUTargetLowering::ImplicitParameter Param =
6623 AMDGPUTargetLowering::QUEUE_PTR;
H A DAMDGPUCallLowering.cpp265 AMDGPUCallLowering::AMDGPUCallLowering(const AMDGPUTargetLowering &TLI)

Completed in 173 milliseconds