Searched refs:reset_mask (Results 1 - 5 of 5) sorted by relevance
| /freebsd-9.3-release/sys/dev/drm2/radeon/ |
| H A D | ni.c | 1424 static int cayman_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) argument
1429 reset_mask &= ~(RADEON_RESET_GFX | RADEON_RESET_COMPUTE);
1432 reset_mask &= ~RADEON_RESET_DMA;
1434 if (reset_mask == 0)
1437 dev_info(rdev->dev, "GPU softreset: 0x%08X\n", reset_mask);
1453 if (reset_mask & (RADEON_RESET_GFX | RADEON_RESET_COMPUTE))
1456 if (reset_mask & RADEON_RESET_DMA)
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| H A D | evergreen.c | 2423 static int evergreen_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) argument
2428 reset_mask &= ~(RADEON_RESET_GFX | RADEON_RESET_COMPUTE);
2431 reset_mask &= ~RADEON_RESET_DMA;
2433 if (reset_mask == 0)
2436 dev_info(rdev->dev, "GPU softreset: 0x%08X\n", reset_mask);
2443 if (reset_mask & (RADEON_RESET_GFX | RADEON_RESET_COMPUTE))
2446 if (reset_mask & RADEON_RESET_DMA)
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| H A D | r600.c | 1383 static int r600_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) argument
1388 reset_mask &= ~(RADEON_RESET_GFX | RADEON_RESET_COMPUTE);
1391 reset_mask &= ~RADEON_RESET_DMA;
1393 if (reset_mask == 0)
1396 dev_info(rdev->dev, "GPU softreset: 0x%08X\n", reset_mask);
1403 if (reset_mask & (RADEON_RESET_GFX | RADEON_RESET_COMPUTE))
1406 if (reset_mask & RADEON_RESET_DMA)
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| H A D | si.c | 2239 static int si_gpu_soft_reset(struct radeon_device *rdev, u32 reset_mask) argument
2244 reset_mask &= ~(RADEON_RESET_GFX | RADEON_RESET_COMPUTE);
2247 reset_mask &= ~RADEON_RESET_DMA;
2249 if (reset_mask == 0)
2252 dev_info(rdev->dev, "GPU softreset: 0x%08X\n", reset_mask);
2264 if (reset_mask & (RADEON_RESET_GFX | RADEON_RESET_COMPUTE))
2267 if (reset_mask & RADEON_RESET_DMA)
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| /freebsd-9.3-release/sys/dev/aacraid/ |
| H A D | aacraid.c | 3722 u_int32_t status, reset_mask, waitCount, max_msix_orig; local
3790 AAC_IOP_RESET_ALWAYS, 0, 0, 0, 0, &status, &reset_mask)) != 0) {
3817 AAC_MEM0_SETREG4(sc, AAC_SRC_IDBR, reset_mask);
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