Searched refs:port_wr (Results 1 - 8 of 8) sorted by relevance

/freebsd-9.3-release/sys/dev/sound/isa/
H A Dgusc.c163 port_wr(struct resource *r, int i, unsigned char v) function
202 port_wr(res, 3, 0x4c);
203 port_wr(res, 5, 0);
206 port_wr(res, 3, 0x4c);
207 port_wr(res, 5, 1);
214 port_wr(res, 3, 0x43); /* Register select */
215 port_wr(res, 4, 0); /* Low addr */
216 port_wr(res, 5, 0); /* Med addr */
218 port_wr(res, 3, 0x44); /* Register select */
219 port_wr(re
[all...]
H A Dmss.c208 port_wr(struct resource *port, int off, u_int8_t data) function
227 port_wr(mss->io_base, reg, data);
233 port_wr(mss->conf_base, 0, reg);
234 port_wr(mss->conf_base, 1, value);
240 port_wr(mss->conf_base, 0, reg);
247 port_wr(mss->conf_base, mss->opti_offset + 0, reg);
248 port_wr(mss->conf_base, mss->opti_offset + 1, value);
254 port_wr(mss->conf_base, mss->opti_offset + 0, reg);
261 port_wr(mss->conf_base, 3, reg);
262 port_wr(ms
[all...]
H A Dad1816.c108 port_wr(struct resource *port, int off, u_int8_t data) function
125 port_wr(ad1816->io_base, reg, data);
H A Dsb8.c134 port_wr(struct resource *port, int off, u_int8_t data) function
148 port_wr(sb->io_base, reg, val);
H A Dess.c163 port_wr(struct resource *port, int off, u_int8_t data) function
179 port_wr(sc->io_base, reg, val);
979 port_wr(io, 0, i);
H A Dsb16.c149 port_wr(struct resource *port, int off, u_int8_t data) function
163 port_wr(sb->io_base, reg, val);
/freebsd-9.3-release/sys/dev/sound/pci/
H A Dsolo.c172 port_wr(struct resource *port, int regno, u_int32_t data, int size) function
199 port_wr(sc->sb, reg, val, 1);
774 port_wr(sc->vc, 0x8, 0xc4, 1); /* command */
775 port_wr(sc->vc, 0xd, 0xff, 1); /* reset */
776 port_wr(sc->vc, 0xf, 0x01, 1); /* mask */
777 port_wr(sc->vc, 0xb, dir == PCMDIR_PLAY? 0x58 : 0x54, 1); /* mode */
778 port_wr(sc->vc, 0x0, base, 4);
779 port_wr(sc->vc, 0x4, cnt - 1, 2);
782 port_wr(sc->io, 0x6, 0x08, 1); /* autoinit */
783 port_wr(s
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/freebsd-9.3-release/sys/contrib/octeon-sdk/
H A Dcvmx-sriomaintx-defs.h1177 uint32_t port_wr : 1; /**< PE can Port Write operations. member in struct:cvmx_sriomaintx_dst_ops::cvmx_sriomaintx_dst_ops_s
1182 uint32_t port_wr : 1;
4311 uint32_t port_wr : 1; /**< PE can Port Write operations. member in struct:cvmx_sriomaintx_src_ops::cvmx_sriomaintx_src_ops_s
4316 uint32_t port_wr : 1;

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