Searched refs:instruction (Results 1 - 25 of 36) sorted by relevance

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/freebsd-9.3-release/contrib/xz/src/liblzma/simple/
H A Dia64.c41 uint64_t instruction = 0; variable
44 instruction += (uint64_t)(
48 uint64_t inst_norm = instruction >> bit_res;
73 instruction &= (1 << bit_res) - 1;
74 instruction |= (inst_norm << bit_res);
78 instruction
/freebsd-9.3-release/contrib/binutils/gas/config/
H A Dtc-arm.c259 instruction. (For backward compatibility, those instructions
262 - The IT instruction may appear, and if it does is validated
275 conditional affix except in the scope of an IT instruction. */
307 unsigned long instruction; member in struct:arm_it
312 unconditional versions of the instruction, or -1 if nothing is
316 /* Set to the opcode if the instruction needs relaxation.
317 Zero if the instruction is not relaxed. */
520 /* Parameters to instruction. */
526 /* Basic instruction code. */
529 /* Thumb-format instruction cod
17641 negate_data_op(unsigned long * instruction, unsigned long value) argument
17721 thumb32_negate_data_op(offsetT *instruction, unsigned int value) argument
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H A Dtc-score.c47 #define BAD_ARGS _("bad arguments to instruction")
49 #define BAD_COND _("instruction is not conditional")
53 #define ERR_FOR_SCORE5U_ATOMIC _("This architecture doesn't support atomic instruction")
56 #define BAD_GARBAGE _("garbage following instruction");
123 /* Default will do instruction relax, -O0 will set g_opt = 0. */
141 unsigned long instruction; member in struct:score_it
753 /* Macro instruction. */
871 inst.instruction |= reg << shift;
927 if ((((inst.instruction >> 15) & 0x10) == 0)
928 && (((inst.instruction >> 1
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H A Dtc-cr16.c36 /* Maximum size of a single instruction (in words). */
65 /* Current instruction we're assembling. */
66 const inst *instruction; variable
73 /* Array to hold an instruction encoding. */
79 /* A copy of the original instruction (used in error messages). */
445 /* Reset global variables before parsing a new instruction. */
614 /* 'opcode' points to the start of the instruction, whether
615 we need to change the instruction's fixed encoding. */
699 /* Apply a fixS (fixup of an instruction or data that we didn't have
799 /* Insert unique names into hash table. The CR16 instruction se
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/freebsd-9.3-release/contrib/binutils/opcodes/
H A Dcr16-dis.c48 /* Structure to map valid 'cinv' instruction options. */
70 /* Number of valid 'cinv' instruction options. */
84 const inst *instruction; variable
85 /* Current instruction we're disassembling. */
87 /* The current instruction is read into 3 consecutive words. */
93 /* Nonzero means a IMM4 instruction. */
95 /* Nonzero means the instruction's original size is
126 /* Retrieve the number of operands for the current assembled instruction. */
133 for (i = 0; instruction->operands[i].op_type && i < MAX_OPERANDS; i++)
161 /* Given a 'CC' instruction constan
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H A Darc-dis.h53 unsigned char* instruction; member in struct:arcDisState
/freebsd-9.3-release/sys/pci/
H A Dlocate.pl10 Useful to find the failed NCR instruction ...
/freebsd-9.3-release/contrib/binutils/include/opcode/
H A Dalpha.h72 /* A macro to extract the major opcode from an instruction. */
87 /* How far the operand is left shifted in the instruction. */
97 operand value into an instruction, check this field.
101 (i is the instruction which we are filling in, o is a pointer to
106 instruction and the operand value. It will return the new value
107 of the instruction. If the ERRMSG argument is not NULL, then if
112 unsigned (*insert) (unsigned instruction, int op, const char **errmsg);
115 extract this operand type from an instruction, check this field.
122 (i is the instruction, o is a pointer to this structure, and op
126 instruction valu
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H A Dppc.h122 /* Opcode is an e500 SPE floating point instruction. */
149 /* A macro to extract the major opcode from an instruction. */
160 /* How far the operand is left shifted in the instruction.
166 operand value into an instruction, check this field.
170 (i is the instruction which we are filling in, o is a pointer to
174 instruction and the operand value. It will return the new value
175 of the instruction. If the ERRMSG argument is not NULL, then if
181 (unsigned long instruction, long op, int dialect, const char **errmsg);
184 extract this operand type from an instruction, check this field.
190 (i is the instruction,
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H A Dcr16.h157 /* CR16 instruction types. */
170 /* Maximum value supported for instruction types. */
172 /* Mask to record an instruction type. */
174 /* Return instruction type, given instruction's attributes. */
177 /* Indicates whether this instruction has a register list as parameter. */
184 /* Printing formats, where the instruction prefix isn't consecutive. */
192 /* Indicates whether this instruction can be relaxed. */
195 /* Indicates that instruction uses user registers (and not
206 /* Maximum operands per instruction
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/freebsd-9.3-release/sys/dev/aic7xxx/aicasm/
H A Daicasm_insformat.h104 struct instruction { struct
108 STAILQ_ENTRY(instruction) links;
H A Daicasm.h88 struct instruction *seq_alloc(void);
H A Daicasm.c100 static STAILQ_HEAD(,instruction) seq_program;
323 struct instruction *cur_instr;
352 struct instruction *cur_instr;
525 struct instruction *cur_instr;
605 /* Don't count this instruction as it is in a patch
735 struct instruction *
738 struct instruction *new_instr;
740 new_instr = (struct instruction *)malloc(sizeof(struct instruction));
742 stop("Unable to malloc instruction objec
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H A Daicasm_gram.y1607 struct instruction *instr;
1620 /* Allocate sequencer space for the instruction and fill it out */
1682 struct instruction *instr;
1693 /* Allocate sequencer space for the instruction and fill it out */
1743 struct instruction *instr;
1753 /* Allocate sequencer space for the instruction and fill it out */
1757 /* 'dot' referrence. Use the current instruction pointer */
/freebsd-9.3-release/sys/mips/rmi/dev/sec/
H A Drmilib.c151 desc->ctl_desc.instruction = 0;
1008 SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_BYPASS);
1013 SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_DES);
1017 SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_3DES);
1022 SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_AES128);
1027 SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_AES192);
1032 SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_AES256);
1036 SET_FIELD(ctl_desc->instruction, CTL_DSC_CPHR, CTL_DSC_CPHR_ARC4);
1037 SET_FIELD(ctl_desc->instruction, CTL_DSC_ARC4_KEYLEN,
1039 SET_FIELD(ctl_desc->instruction, CTL_DSC_ARC4_LOADSTAT
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/freebsd-9.3-release/sys/boot/pc98/boot0.5/
H A Dstart.s46 # The instruction 'call 0x9ab' can be here. See also selector.s.
/freebsd-9.3-release/contrib/binutils/ld/scripttempl/
H A Dnw.sc105 /* We want the small data sections together, so single-instruction offsets
/freebsd-9.3-release/crypto/openssl/crypto/
H A Dsparccpuid.S40 ! Following is V9 "rd %ccr,%o0" instruction. However! V8
/freebsd-9.3-release/sys/boot/i386/mbr/
H A Dmbr.s55 # zero from the repeated string instruction above. We save the offset of
/freebsd-9.3-release/contrib/llvm/lib/Support/Unix/
H A DSignals.inc190 // *after* the faulting instruction. Simply returning from the signal
/freebsd-9.3-release/contrib/gcc/config/arm/
H A Dlib1funcs.asm1144 one of these labels is called via a BL instruction. This puts the
1182 when the target address is in an unknown instruction set. The address
1184 labels is called via a BL instruction. This puts the return address
1187 the target code cannot be relied upon to return via a BX instruction, so
/freebsd-9.3-release/sys/mips/mips/
H A Dexception.S253 * counter. The ddb backtrace code looks for the first instruction
1053 * fetch the instruction, compute the next PC and emulate the instruction.
1058 * The instruction is in the branch delay slot so the branch will have to
1066 move a1, a2 # second arg is instruction PC
1072 * Now load the floating-point instruction in the branch delay slot
1077 lw a0, 4(a2) # a0 = coproc instruction
1083 lw a0, 0(a2) # a0 = coproc instruction
1091 * Check to see if the instruction to be emulated is a floating-point
1092 * instruction
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/freebsd-9.3-release/contrib/gcc/config/sparc/
H A Dlb1spc.asm426 ! non-restoring fixup here (one instruction only!)
771 ! non-restoring fixup here (one instruction only!)
/freebsd-9.3-release/sys/boot/pc98/cdboot/
H A Dcdboot.S468 # instruction pre-fetch queue
501 # instruction pre-fetch queue
/freebsd-9.3-release/contrib/binutils/gas/
H A Dmacro.c937 comment field depends upon the exact instruction

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