/freebsd-9.3-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeVectorOps.cpp | 133 for (unsigned i = 0, e = Op.getNode()->getNumValues(); i != e; ++i) 144 SDNode* Node = Op.getNode(); 152 SDValue(DAG.UpdateNodeOperands(Op.getNode(), Ops.data(), Ops.size()), 0); 155 LoadSDNode *LD = cast<LoadSDNode>(Op.getNode()); 164 StoreSDNode *ST = cast<StoreSDNode>(Op.getNode()); 282 if (Tmp1.getNode()) { 302 Result = DAG.UnrollVectorOp(Op.getNode()); 323 assert(Op.getNode()->getNumValues() == 1 && 331 Operands[j] = DAG.getNode(ISD::BITCAST, dl, NVT, Op.getOperand(j)); 336 Op = DAG.getNode(O [all...] |
H A D | DAGCombiner.cpp | 182 // SDValue.getNode() == 0 - No change was made 183 // SDValue.getNode() == N - N was replaced, is dead and has been handled. 515 return DAG.getNode(ISD::FSUB, SDLoc(Op), Op.getValueType(), 520 return DAG.getNode(ISD::FSUB, SDLoc(Op), Op.getValueType(), 534 return DAG.getNode(ISD::FSUB, SDLoc(Op), Op.getValueType(), 545 return DAG.getNode(Op.getOpcode(), SDLoc(Op), Op.getValueType(), 551 return DAG.getNode(Op.getOpcode(), SDLoc(Op), Op.getValueType(), 558 return DAG.getNode(Op.getOpcode(), SDLoc(Op), Op.getValueType(), 562 return DAG.getNode(ISD::FP_ROUND, SDLoc(Op), Op.getValueType(), 601 if (isSetCCEquivalent(N, N0, N1, N2) && N.getNode() [all...] |
H A D | LegalizeVectorTypes.cpp | 126 if (R.getNode()) 133 return DAG.getNode(N->getOpcode(), SDLoc(N), 141 return DAG.getNode(N->getOpcode(), SDLoc(N), 153 return DAG.getNode(ISD::BITCAST, SDLoc(N), 163 return DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, InOp); 179 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N), 187 return DAG.getNode(ISD::FP_ROUND, SDLoc(N), 193 return DAG.getNode(ISD::FPOWI, SDLoc(N), 204 Op = DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, Op); 233 return DAG.getNode( [all...] |
H A D | LegalizeIntegerTypes.cpp | 143 if (Res.getNode()) 156 return DAG.getNode(ISD::AssertSext, SDLoc(N), 163 return DAG.getNode(ISD::AssertZext, SDLoc(N), 220 return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetPromotedInteger(InOp)); 224 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, GetSoftenedFloat(InOp)); 231 return DAG.getNode(ISD::ANY_EXTEND, dl, NOutVT, 245 InOp = DAG.getNode(ISD::ANY_EXTEND, dl, 249 return DAG.getNode(ISD::BITCAST, dl, NOutVT, InOp); 256 return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetWidenedVector(InOp)); 259 return DAG.getNode(IS [all...] |
H A D | ResourcePriorityQueue.cpp | 79 const SDNode *ScegN = PredSU->getNode(); 117 const SDNode *ScegN = SuccSU->getNode(); 135 MVT VT = Op.getNode()->getSimpleValueType(Op.getResNo()); 248 if (!SU || !SU->getNode()) 253 if (SU->getNode()->getGluedNode()) 258 if (SU->getNode()->isMachineOpcode()) 259 switch (SU->getNode()->getMachineOpcode()) { 262 SU->getNode()->getMachineOpcode()))) 293 if (!isResourceAvailable(SU) || SU->getNode()->getGluedNode()) { 298 if (SU->getNode() [all...] |
H A D | SelectionDAGBuilder.cpp | 136 Lo = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[0]); 137 Hi = DAG.getNode(ISD::BITCAST, DL, HalfVT, Parts[1]); 143 Val = DAG.getNode(ISD::BUILD_PAIR, DL, RoundVT, Lo, Hi); 157 Hi = DAG.getNode(ISD::ANY_EXTEND, DL, TotalVT, Hi); 158 Hi = DAG.getNode(ISD::SHL, DL, TotalVT, Hi, 161 Lo = DAG.getNode(ISD::ZERO_EXTEND, DL, TotalVT, Lo); 162 Val = DAG.getNode(ISD::OR, DL, TotalVT, Lo, Hi); 169 Lo = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[0]); 170 Hi = DAG.getNode(ISD::BITCAST, DL, EVT(MVT::f64), Parts[1]); 173 Val = DAG.getNode(IS [all...] |
H A D | LegalizeTypesGeneric.cpp | 54 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); 55 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); 61 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); 62 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); 68 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); 69 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); 74 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); 75 Hi = DAG.getNode(ISD::BITCAST, dl, NOutVT, Hi); 85 Lo = DAG.getNode(ISD::BITCAST, dl, NOutVT, Lo); 86 Hi = DAG.getNode(IS [all...] |
H A D | LegalizeDAG.cpp | 174 ReplacedNode(Old.getNode()); 324 SDValue Result = DAG.getNode(ISD::BITCAST, dl, intVT, Val); 365 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr, 367 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, Increment); 390 DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &Stores[0], 407 SDValue Hi = DAG.getNode(ISD::SRL, dl, VT, Val, ShiftAmount); 415 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr, 424 DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Store1, Store2); 447 SDValue Result = DAG.getNode(ISD::BITCAST, dl, LoadedVT, newLoad); 449 Result = DAG.getNode(V [all...] |
H A D | LegalizeTypes.cpp | 44 // folding that occurs when using the DAG.getNode operators. Secondly, a new 102 assert(NewVal.getNode()->getNodeId() != NewNode && 271 if (IgnoreNodeResults(N->getOperand(i).getNode())) 394 // the checking loop below. Implicit folding by the DAG.getNode operators and 416 if (!IgnoreNodeResults(I->getOperand(i).getNode()) && 476 if (Op.getNode()->getNodeId() == Processed) 522 Val.setNode(AnalyzeNewNode(Val.getNode())); 523 if (Val.getNode()->getNodeId() == Processed) 558 assert(I->first.getNode() != N); 564 assert(I->first.getNode() ! [all...] |
/freebsd-9.3-release/contrib/llvm/include/llvm/CodeGen/ |
H A D | MachinePostDominators.h | 50 return DT->getNode(BB); 53 MachineDomTreeNode *getNode(MachineBasicBlock *BB) const { function in struct:llvm::MachinePostDominatorTree 54 return DT->getNode(BB);
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/freebsd-9.3-release/contrib/llvm/lib/Target/SystemZ/ |
H A D | SystemZSelectionDAGInfo.cpp | 49 return DAG.getNode(Loop, DL, MVT::Other, Chain, Dst, Src, 52 return DAG.getNode(Sequence, DL, MVT::Other, Chain, Dst, Src, 115 Dst = DAG.getNode(ISD::ADD, DL, PtrVT, Dst, 120 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chain1, Chain2); 129 SDValue Dst2 = DAG.getNode(ISD::ADD, DL, PtrVT, Dst, 134 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Chain1, Chain2); 149 SDValue DstPlus1 = DAG.getNode(ISD::ADD, DL, PtrVT, Dst, 172 return DAG.getNode(SystemZISD::CLC_LOOP, DL, VTs, Chain, Src1, Src2, 175 return DAG.getNode(SystemZISD::CLC, DL, VTs, Chain, Src1, Src2, 184 SDValue IPM = DAG.getNode(SystemZIS [all...] |
/freebsd-9.3-release/contrib/llvm/lib/Target/Mips/ |
H A D | MipsSEISelLowering.cpp | 296 SDNode *ADDCNode = ADDENode->getOperand(2).getNode(); 303 SDNode *MultNode = MultHi.getNode(); 307 if (MultLo.getNode() != MultNode) 332 SDValue ACCIn = CurDAG->getNode(MipsISD::MTLOHI, DL, MVT::Untyped, 339 SDValue MAdd = CurDAG->getNode(MultOpc, DL, MVT::Untyped, 346 SDValue LoOut = CurDAG->getNode(MipsISD::MFLO, DL, MVT::i32, MAdd); 350 SDValue HiOut = CurDAG->getNode(MipsISD::MFHI, DL, MVT::i32, MAdd); 368 SDNode *SUBCNode = SUBENode->getOperand(2).getNode(); 375 SDNode *MultNode = MultHi.getNode(); 379 if (MultLo.getNode() ! [all...] |
/freebsd-9.3-release/contrib/llvm/lib/Target/R600/ |
H A D | AMDGPUISelLowering.cpp | 247 return DAG.getNode(AMDGPUISD::RET_FLAG, DL, MVT::Other, Chain); 258 Op.getNode()->dump(); 312 Args.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(Op), 329 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(Op), Op.getValueType(), 342 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(Op), Op.getValueType(), 373 return DAG.getNode(ISD::FEXP2, DL, VT, Op.getOperand(1)); 377 return DAG.getNode(AMDGPUISD::FRACT, DL, VT, Op.getOperand(1)); 379 return DAG.getNode(AMDGPUISD::FMAX, DL, VT, Op.getOperand(1), 382 return DAG.getNode(AMDGPUISD::SMAX, DL, VT, Op.getOperand(1), 385 return DAG.getNode(AMDGPUIS [all...] |
H A D | AMDILISelLowering.cpp | 302 DST = SDValue(Op.getNode(), 0); 320 DST = SDValue(Op.getNode(), 0); 339 Data = DAG.getNode(ISD::ZERO_EXTEND, DL, IVT, Data); 345 Data = DAG.getNode(ISD::SHL, DL, DVT, Data, Shift); 347 Data = DAG.getNode(ISD::SRA, DL, DVT, Data, Shift); 383 Result = DAG.getNode( 411 SDValue jq = DAG.getNode(ISD::XOR, DL, OVT, LHS, RHS); 414 jq = DAG.getNode(ISD::SRA, DL, OVT, jq, DAG.getConstant(bitsize - 2, OVT)); 417 jq = DAG.getNode(ISD::OR, DL, OVT, jq, DAG.getConstant(1, OVT)); 429 SDValue fa = DAG.getNode(IS [all...] |
H A D | R600ISelLowering.cpp | 541 return DAG.getNode(AMDGPUISD::EXPORT, SDLoc(Op), Op.getValueType(), 618 return DAG.getNode(ISD::BUILD_VECTOR, DL, MVT::v2f32, 692 return DAG.getNode(AMDGPUISD::TEXTURE_FETCH, DL, MVT::v4f32, TexArgs, 19); 696 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1), 698 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2), 700 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1), 702 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2), 704 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(1), 706 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, MVT::f32, Op.getOperand(2), 708 DAG.getNode(IS [all...] |
/freebsd-9.3-release/contrib/llvm/lib/Target/ARM/ |
H A D | ARMSelectionDAGInfo.cpp | 67 DAG.getNode(ISD::ADD, dl, MVT::i32, Src, 74 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i); 79 DAG.getNode(ISD::ADD, dl, MVT::i32, Dst, 85 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i); 106 DAG.getNode(ISD::ADD, dl, MVT::i32, Src, 115 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i); 129 DAG.getNode(ISD::ADD, dl, MVT::i32, Dst, 136 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &TFOps[0], i); 171 Src = DAG.getNode(ISD::TRUNCATE, dl, MVT::i32, Src); 173 Src = DAG.getNode(IS [all...] |
H A D | ARMISelLowering.cpp | 1351 Val = DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); 1354 SDValue Vec = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64); 1355 Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Vec, Val, 1366 Val = DAG.getNode(ARMISD::VMOVDRR, dl, MVT::f64, Lo, Hi); 1367 Val = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64, Vec, Val, 1381 Val = DAG.getNode(ISD::BITCAST, dl, VA.getValVT(), Val); 1400 PtrOff = DAG.getNode(ISD::ADD, dl, getPointerTy(), StackPtr, PtrOff); 1414 SDValue fmrrd = DAG.getNode(ARMISD::VMOVRRD, dl, 1422 if (StackPtr.getNode() == 0) 1510 Arg = DAG.getNode(IS [all...] |
/freebsd-9.3-release/contrib/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 212 case ISD::SUB: return ExpandADDSUB(Op.getNode(), DAG); 246 SDValue Cond = DAG.getNode(ISD::SETCC, dl, MVT::i32, Op.getOperand(2), 248 return DAG.getNode(ISD::SELECT, dl, MVT::i32, Cond, Op.getOperand(0), 264 return DAG.getNode(XCoreISD::CPRelativeWrapper, dl, MVT::i32, GA); 265 return DAG.getNode(XCoreISD::DPRelativeWrapper, dl, MVT::i32, GA); 267 return DAG.getNode(XCoreISD::PCRelativeWrapper, dl, MVT::i32, GA); 284 GA = DAG.getNode(ISD::ADD, DL, MVT::i32, GA, Remaining); 297 return DAG.getNode(XCoreISD::PCRelativeWrapper, DL, getPointerTy(), Result); 315 return DAG.getNode(XCoreISD::CPRelativeWrapper, dl, MVT::i32, Res); 337 return DAG.getNode(XCoreIS [all...] |
/freebsd-9.3-release/contrib/llvm/include/llvm/Analysis/ |
H A D | PostDominators.h | 50 return DT->getNode(BB); 53 inline DomTreeNode *getNode(BasicBlock *BB) const { function in struct:llvm::PostDominatorTree 54 return DT->getNode(BB);
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/freebsd-9.3-release/contrib/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 87 return DAG.getNode(ISD::BUILD_VECTOR, dl, ResultVT, 91 SDValue Result = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, ResultVT, Vec, 138 return DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResultVT, Result, Vec, 1703 return DAG.getNode(X86ISD::GlobalBaseReg, SDLoc(), getPointerTy()); 1827 ValToCopy = DAG.getNode(ISD::SIGN_EXTEND, dl, VA.getLocVT(), ValToCopy); 1829 ValToCopy = DAG.getNode(ISD::ZERO_EXTEND, dl, VA.getLocVT(), ValToCopy); 1831 ValToCopy = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), ValToCopy); 1833 ValToCopy = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), ValToCopy); 1856 ValToCopy = DAG.getNode(ISD::FP_EXTEND, dl, MVT::f80, ValToCopy); 1867 ValToCopy = DAG.getNode(IS [all...] |
H A D | X86ISelDAGToDAG.cpp | 83 IndexReg.getNode() != 0 || Base_Reg.getNode() != 0; 91 dyn_cast_or_null<RegisterSDNode>(Base_Reg.getNode())) 105 if (Base_Reg.getNode() != 0) 106 Base_Reg.getNode()->dump(); 112 if (IndexReg.getNode() != 0) 113 IndexReg.getNode()->dump(); 258 if (AM.Segment.getNode()) 366 if (Chain.getNode() == Load.getNode()) [all...] |
/freebsd-9.3-release/contrib/llvm/lib/Analysis/ |
H A D | TypeBasedAliasAnalysis.cpp | 150 /// getNode - Get the MDNode for this TBAANode. 151 const MDNode *getNode() const { return Node; } function in class:__anon2089::TBAANode 189 const MDNode *getNode() const { return Node; } function in class:__anon2089::TBAAStructTagNode 225 const MDNode *getNode() const { return Node; } function in class:__anon2089::TBAAStructTypeNode 351 if (T.getNode() == B) 357 if (!T.getNode()) 363 if (T.getNode() == A) 369 if (!T.getNode()) 377 if (RootA.getNode() != RootB.getNode()) [all...] |
/freebsd-9.3-release/contrib/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 703 else if (ISD::isEXTLoad(Op.getNode()) || ISD::isNON_EXTLoad(Op.getNode())) { 905 if (UniquedVals[i&(Multiple-1)].getNode() == 0) 920 if (UniquedVals[i].getNode() == 0) continue; // Must have been undefs. 927 if (UniquedVals[Multiple-1].getNode() == 0) 934 if (UniquedVals[Multiple-1].getNode() == 0) 947 if (OpVal.getNode() == 0) 953 if (OpVal.getNode() == 0) return SDValue(); // All UNDEF: use implicit def. 1012 return isIntS16Immediate(Op.getNode(), Imm); 1262 if (Val == Base || Base.getNode() [all...] |
/freebsd-9.3-release/contrib/llvm/include/llvm/CodeGen/PBQP/ |
H A D | Graph.h | 104 NodeEntry& getNode(NodeId nId) { return nodes[nId]; } function in class:PBQP::Graph 105 const NodeEntry& getNode(NodeId nId) const { return nodes[nId]; } function in class:PBQP::Graph 137 NodeEntry &n1 = getNode(ne.getNode1()); 138 NodeEntry &n2 = getNode(ne.getNode2()); 239 Vector& getNodeCosts(NodeId nId) { return getNode(nId).getCosts(); } 245 return getNode(nId).getCosts(); 253 void setNodeData(NodeId nId, void *data) { getNode(nId).setData(data); } 258 void* getNodeData(NodeId nId) { return getNode(nId).getData(); } 288 return getNode(nId).getDegree(); 307 return getNode(nI [all...] |
/freebsd-9.3-release/contrib/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 1085 FIN = DAG.getNode(ISD::ADD, DL, getPointerTy(), FIN, 1109 FIN = DAG.getNode(ISD::ADD, DL, getPointerTy(), FIN, 1124 Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, &MemOps[0], 1192 ArgValue = DAG.getNode(ISD::BITCAST,dl, VA.getValVT(), ArgValue); 1296 Arg = DAG.getNode(ISD::ANY_EXTEND, dl, VA.getLocVT(), Arg); 1299 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); 1311 if (Flag.getNode()) 1314 return DAG.getNode(AArch64ISD::Ret, dl, MVT::Other, 1433 Arg = DAG.getNode(ISD::BITCAST, dl, VA.getLocVT(), Arg); 1465 DstAddr = DAG.getNode(IS [all...] |