Searched refs:getMachineOpValue (Results 1 - 13 of 13) sorted by relevance

/freebsd-9.3-release/contrib/llvm/lib/Target/R600/MCTargetDesc/
H A DAMDGPUMCCodeEmitter.h33 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO, function in class:llvm::AMDGPUMCCodeEmitter
H A DR600MCCodeEmitter.cpp50 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
169 uint64_t R600MCCodeEmitter::getMachineOpValue(const MCInst &MI, function in class:R600MCCodeEmitter
H A DSIMCCodeEmitter.cpp61 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
169 uint64_t SIMCCodeEmitter::getMachineOpValue(const MCInst &MI, function in class:SIMCCodeEmitter
/freebsd-9.3-release/contrib/llvm/lib/Target/SystemZ/MCTargetDesc/
H A DSystemZMCCodeEmitter.cpp48 uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
106 getMachineOpValue(const MCInst &MI, const MCOperand &MO, function in class:SystemZMCCodeEmitter
118 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups);
119 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups);
127 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups);
128 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups);
136 uint64_t Base = getMachineOpValue(MI, MI.getOperand(OpNum), Fixups);
137 uint64_t Disp = getMachineOpValue(MI, MI.getOperand(OpNum + 1), Fixups);
138 uint64_t Index = getMachineOpValue(MI, MI.getOperand(OpNum + 2), Fixups);
146 uint64_t Base = getMachineOpValue(M
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/freebsd-9.3-release/contrib/llvm/lib/Target/PowerPC/MCTargetDesc/
H A DPPCMCCodeEmitter.cpp69 /// getMachineOpValue - Return binary encoding of operand. If the machine
71 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
120 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups);
131 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups);
143 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups);
155 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups);
166 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups);
179 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups) << 16;
183 return (getMachineOpValue(MI, MO, Fixups) & 0xFFFF) | RegBits;
197 unsigned RegBits = getMachineOpValue(M
246 getMachineOpValue(const MCInst &MI, const MCOperand &MO, function in class:PPCMCCodeEmitter
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/freebsd-9.3-release/contrib/llvm/lib/Target/Sparc/MCTargetDesc/
H A DSparcMCCodeEmitter.cpp50 /// getMachineOpValue - Return binary encoding of operand. If the machine
52 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
91 uint64_t op = getMachineOpValue(MI, MO, Fixups);
101 getMachineOpValue(const MCInst &MI, const MCOperand &MO, function in class:SparcMCCodeEmitter
131 return getMachineOpValue(MI, MO, Fixups);
165 return getMachineOpValue(MI, MO, Fixups);
/freebsd-9.3-release/contrib/llvm/lib/Target/PowerPC/
H A DPPCCodeEmitter.cpp59 /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
60 unsigned getMachineOpValue(const MachineInstr &MI,
187 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO);
203 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO);
216 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO);
234 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1)) << 16;
238 return (getMachineOpValue(MI, MO) & 0xFFFF) | RegBits;
250 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo+1)) << 14;
254 return ((getMachineOpValue(MI, MO) >> 2) & 0x3FFF) | RegBits;
273 unsigned PPCCodeEmitter::getMachineOpValue(cons function in class:PPCCodeEmitter
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/freebsd-9.3-release/contrib/llvm/lib/Target/ARM/
H A DARMCodeEmitter.cpp148 /// getMachineOpValue - Return binary encoding of operand. If the machine
150 unsigned getMachineOpValue(const MachineInstr &MI,
152 unsigned getMachineOpValue(const MachineInstr &MI, unsigned OpIdx) const { function in class:__anon2319::ARMCodeEmitter
153 return getMachineOpValue(MI, MI.getOperand(OpIdx));
158 // operand values, instead querying getMachineOpValue() directly for
450 /// getMachineOpValue - Return binary encoding of operand. If the machine
452 unsigned ARMCodeEmitter::getMachineOpValue(const MachineInstr &MI, function in class:ARMCodeEmitter
708 Binary |= getMachineOpValue(MI, MO0) << ARMII::RegRdShift;
723 Binary |= getMachineOpValue(MI, MO0) << ARMII::RegRdShift;
746 Binary |= getMachineOpValue(M
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/freebsd-9.3-release/contrib/llvm/lib/Target/Sparc/
H A DSparcCodeEmitter.cpp70 /// getMachineOpValue - Return binary encoding of operand. If the machine
72 unsigned getMachineOpValue(const MachineInstr &MI,
169 /// getMachineOpValue - Return binary encoding of operand. If the machine
171 unsigned SparcCodeEmitter::getMachineOpValue(const MachineInstr &MI, function in class:SparcCodeEmitter
192 return getMachineOpValue(MI, MO);
198 return getMachineOpValue(MI, MO);
/freebsd-9.3-release/contrib/llvm/lib/Target/Mips/
H A DMipsCodeEmitter.cpp99 /// getMachineOpValue - Return binary encoding of operand. If the machine
101 unsigned getMachineOpValue(const MachineInstr &MI,
217 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo)) << 16;
218 return (getMachineOpValue(MI, MI.getOperand(OpNo+1)) & 0xFFFF) | RegBits;
230 return getMachineOpValue(MI, MI.getOperand(OpNo)) - 1;
236 return getMachineOpValue(MI, MI.getOperand(OpNo-1)) +
237 getMachineOpValue(MI, MI.getOperand(OpNo)) - 1;
246 /// getMachineOpValue - Return binary encoding of operand. If the machine
248 unsigned MipsCodeEmitter::getMachineOpValue(const MachineInstr &MI, function in class:MipsCodeEmitter
/freebsd-9.3-release/contrib/llvm/lib/Target/Mips/MCTargetDesc/
H A DMipsMCCodeEmitter.cpp105 // getMachineOpValue - Return binary encoding of operand. If the machin
107 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
463 /// getMachineOpValue - Return binary encoding of operand. If the machine
466 getMachineOpValue(const MCInst &MI, const MCOperand &MO,
490 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo),Fixups) << 16;
491 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups);
501 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups) << 16;
502 unsigned OffBits = getMachineOpValue(MI, MI.getOperand(OpNo+1), Fixups);
511 unsigned SizeEncoding = getMachineOpValue(MI, MI.getOperand(OpNo), Fixups);
522 unsigned Position = getMachineOpValue(M
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/freebsd-9.3-release/contrib/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64MCCodeEmitter.cpp104 /// getMachineOpValue - Return binary encoding of operand. If the machine
106 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
409 AArch64MCCodeEmitter::getMachineOpValue(const MCInst &MI, function in class:AArch64MCCodeEmitter
/freebsd-9.3-release/contrib/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMMCCodeEmitter.cpp71 /// getMachineOpValue - Return binary encoding of operand. If the machine
73 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
415 /// getMachineOpValue - Return binary encoding of operand. If the machine
418 getMachineOpValue(const MCInst &MI, const MCOperand &MO, function in class:ARMMCCodeEmitter

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