Searched refs:ctrl_reg (Results 1 - 5 of 5) sorted by relevance

/freebsd-9.3-release/sys/dev/ixgb/
H A Dixgb_hw.c63 uint32_t ctrl_reg; local
68 ctrl_reg = IXGB_CTRL0_RST |
79 IXGB_WRITE_REG_IO(hw, CTRL0, ctrl_reg);
81 IXGB_WRITE_REG(hw, CTRL0, ctrl_reg);
86 ctrl_reg = IXGB_READ_REG(hw, CTRL0);
89 ASSERT(!(ctrl_reg & IXGB_CTRL0_RST));
100 return ctrl_reg;
112 uint32_t ctrl_reg; local
149 ctrl_reg = ixgb_mac_reset(hw);
158 return (ctrl_reg
275 uint32_t ctrl_reg; local
639 uint32_t ctrl_reg; local
[all...]
/freebsd-9.3-release/sys/dev/cpufreq/
H A Dichss.c61 struct resource *ctrl_reg; member in struct:ichss_softc
252 sc->ctrl_reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
254 if (sc->ctrl_reg == NULL) {
342 old_val = ICH_GET_REG(sc->ctrl_reg) & ~ICHSS_CTRL_BIT;
350 ICH_SET_REG(sc->ctrl_reg, old_val | req_val);
354 new_val = ICH_GET_REG(sc->ctrl_reg);
382 state = ICH_GET_REG(sc->ctrl_reg) & ICHSS_CTRL_BIT;
/freebsd-9.3-release/sys/dev/advansys/
H A Dadvansys.c943 u_int8_t ctrl_reg; local
955 ctrl_reg = ADV_INB(adv, ADV_CHIP_CTRL);
956 saved_ctrl_reg = ctrl_reg & (~(ADV_CC_SCSI_RESET | ADV_CC_CHIP_RESET |
976 && (ctrl_reg & ADV_CC_SINGLE_STEP) != 0) {
/freebsd-9.3-release/sys/dev/e1000/
H A De1000_82575.c1499 u32 ctrl_ext, ctrl_reg, reg, anadv_reg; local
1523 ctrl_reg = E1000_READ_REG(hw, E1000_CTRL);
1524 ctrl_reg |= E1000_CTRL_SLU;
1528 ctrl_reg |= E1000_CTRL_SWDPIN0 | E1000_CTRL_SWDPIN1;
1564 ctrl_reg |= E1000_CTRL_SPD_1000 | E1000_CTRL_FRCSPD |
1572 E1000_WRITE_REG(hw, E1000_CTRL, ctrl_reg);
H A De1000_ich8lan.c1889 u32 ctrl_reg = 0; local
1913 ctrl_reg = E1000_READ_REG(hw, E1000_CTRL);
1915 reg = ctrl_reg & ~(E1000_CTRL_SPD_1000 | E1000_CTRL_SPD_100);
1922 E1000_WRITE_REG(hw, E1000_CTRL, ctrl_reg);

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