| /freebsd-9.3-release/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCFastISel.cpp | 875 unsigned TmpReg = createResultReg(&PPC::G8RCRegClass); local
876 if (!PPCEmitIntExt(MVT::i32, SrcReg, MVT::i64, TmpReg, !IsSigned))
878 SrcReg = TmpReg;
952 unsigned TmpReg = createResultReg(&PPC::G8RCRegClass); local
953 if (!PPCEmitIntExt(SrcVT, SrcReg, MVT::i64, TmpReg, !IsSigned))
956 SrcReg = TmpReg;
1046 unsigned TmpReg = createResultReg(&PPC::F8RCRegClass); local
1048 TII.get(TargetOpcode::COPY_TO_REGCLASS), TmpReg)
1050 SrcReg = TmpReg;
1242 unsigned TmpReg local
1254 unsigned TmpReg = createResultReg(RC); local
1565 unsigned TmpReg = createResultReg(RC); local
1574 unsigned TmpReg = createResultReg(RC); local
1808 unsigned TmpReg = createResultReg(&PPC::G8RC_and_G8RC_NOX0RegClass); local
1916 unsigned TmpReg = createResultReg(RC); local
[all...] |
| H A D | PPCFrameLowering.cpp | 1309 unsigned TmpReg = is64Bit ? PPC::X0 : PPC::R0; local
1323 BuildMI(MBB, MBBI, dl, TII.get(LISInstr), TmpReg)
1325 BuildMI(MBB, MBBI, dl, TII.get(ORIInstr), TmpReg)
1326 .addReg(TmpReg, RegState::Kill)
1330 .addReg(TmpReg);
|
| H A D | PPCISelLowering.cpp | 5922 unsigned TmpReg = (!BinOpcode) ? incr : local
5942 BuildMI(BB, dl, TII->get(BinOpcode), TmpReg).addReg(incr).addReg(dest);
5944 .addReg(TmpReg).addReg(ptrA).addReg(ptrB);
6006 unsigned TmpReg = (!BinOpcode) ? Incr2Reg : RegInfo.createVirtualRegister(RC); local
6064 BuildMI(BB, dl, TII->get(BinOpcode), TmpReg)
6069 .addReg(TmpReg).addReg(MaskReg);
6600 unsigned TmpReg = RegInfo.createVirtualRegister(RC); local
6672 BuildMI(BB, dl, TII->get(PPC::AND),TmpReg)
6675 .addReg(TmpReg).addReg(OldVal3Reg);
6702 BuildMI(*BB, BB->begin(), dl, TII->get(PPC::SRW),dest).addReg(TmpReg)
[all...] |
| /freebsd-9.3-release/contrib/llvm/lib/Target/ARM/ |
| H A D | MLxExpansionPass.cpp | 289 unsigned TmpReg = MRI->createVirtualRegister( local
292 MachineInstrBuilder MIB = BuildMI(MBB, MI, MI->getDebugLoc(), MCID1, TmpReg)
304 MIB.addReg(TmpReg, getKillRegState(true))
307 MIB.addReg(AccReg).addReg(TmpReg, getKillRegState(true));
|
| H A D | Thumb1RegisterInfo.cpp | 630 unsigned TmpReg = MI.getOperand(0).getReg();
634 emitThumbRegPlusImmInReg(MBB, II, dl, TmpReg, FrameReg,
637 emitLoadConstPool(MBB, II, dl, TmpReg, 0, Offset);
641 emitThumbRegPlusImmediate(MBB, II, dl, TmpReg, FrameReg, Offset, TII,
646 MI.getOperand(FIOperandNum).ChangeToRegister(TmpReg, false, false, true);
|
| /freebsd-9.3-release/contrib/llvm/lib/Target/X86/AsmParser/ |
| H A D | X86AsmParser.cpp | 204 unsigned BaseReg, IndexReg, TmpReg, Scale; member in class:__anon2501::X86AsmParser::IntelExprStateMachine
213 State(IES_PLUS), PrevState(IES_ERROR), BaseReg(0), IndexReg(0), TmpReg(0),
249 BaseReg = TmpReg;
252 IndexReg = TmpReg;
285 BaseReg = TmpReg;
288 IndexReg = TmpReg;
305 TmpReg = Reg;
355 IndexReg = TmpReg;
426 BaseReg = TmpReg;
429 IndexReg = TmpReg;
1309 unsigned TmpReg; local
[all...] |
| /freebsd-9.3-release/contrib/llvm/lib/Target/Mips/ |
| H A D | MipsSEInstrInfo.cpp | 479 unsigned DstReg = Dst.getReg(), SrcReg = Src.getReg(), TmpReg = DstReg; local
487 TmpReg = getRegisterInfo().getSubReg(DstReg, Mips::sub_lo);
492 BuildMI(MBB, I, DL, MovDesc, TmpReg).addReg(SrcReg, KillSrc);
493 BuildMI(MBB, I, DL, CvtDesc, DstReg).addReg(TmpReg, RegState::Kill);
|
| /freebsd-9.3-release/contrib/llvm/lib/Target/Sparc/ |
| H A D | SparcISelLowering.cpp | 3046 unsigned TmpReg = UpdReg; local
3048 BuildMI(LoopMBB, DL, TII.get(SP::XORri), UpdReg).addReg(TmpReg).addImm(-1);
|
| /freebsd-9.3-release/contrib/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 15133 unsigned TmpReg = MRI.createVirtualRegister(AddrRegClass); local
15136 BuildMI(overflowMBB, DL, TII->get(X86::ADD64ri32), TmpReg)
15141 .addReg(TmpReg)
|