| /freebsd-9.3-release/contrib/llvm/lib/CodeGen/ |
| H A D | DFAPacketizer.cpp | 108 DefaultVLIWScheduler(MachineFunction &MF, MachineLoopInfo &MLI,
116 MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT,
118 ScheduleDAGInstrs(MF, MLI, MDT, IsPostRA) {
129 MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT,
133 VLIWScheduler = new DefaultVLIWScheduler(MF, MLI, MDT, IsPostRA);
115 DefaultVLIWScheduler( MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT, bool IsPostRA) argument
128 VLIWPacketizerList( MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT, bool IsPostRA) argument
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| H A D | CalcSpillWeights.cpp | 27 const MachineLoopInfo &MLI,
34 VirtRegAuxInfo VRAI(MF, LIS, MLI, MBFI, norm);
25 calculateSpillWeightsAndHints(LiveIntervals &LIS, MachineFunction &MF, const MachineLoopInfo &MLI, const MachineBlockFrequencyInfo &MBFI, VirtRegAuxInfo::NormalizingFn norm) argument
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| H A D | PHIElimination.cpp | 81 MachineLoopInfo *MLI);
139 MachineLoopInfo *MLI = getAnalysisIfAvailable<MachineLoopInfo>(); local
141 Changed |= SplitPHIEdges(MF, *I, MLI);
546 MachineLoopInfo *MLI) {
550 const MachineLoop *CurLoop = MLI ? MLI->getLoopFor(&MBB) : 0;
567 const MachineLoop *PreLoop = MLI ? MLI->getLoopFor(PreMBB) : 0;
544 SplitPHIEdges(MachineFunction &MF, MachineBasicBlock &MBB, MachineLoopInfo *MLI) argument
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| H A D | UnreachableBlockElim.cpp | 125 MachineLoopInfo *MLI = getAnalysisIfAvailable<MachineLoopInfo>(); local
144 if (MLI) MLI->removeBlock(BB);
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| H A D | PostRASchedulerList.cpp | 138 MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT,
204 MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT,
208 : ScheduleDAGInstrs(MF, MLI, MDT, /*IsPostRA=*/true), AA(AA),
264 MachineLoopInfo &MLI = getAnalysis<MachineLoopInfo>(); local
298 SchedulePostRATDList Scheduler(Fn, MLI, MDT, AA, RegClassInfo, AntiDepMode,
203 SchedulePostRATDList( MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT, AliasAnalysis *AA, const RegisterClassInfo &RCI, TargetSubtargetInfo::AntiDepBreakMode AntiDepMode, SmallVectorImpl<const TargetRegisterClass*> &CriticalPathRCs) argument
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| H A D | MachineBlockPlacement.cpp | 174 const MachineLoopInfo *MLI; member in class:__anon2135::MachineBlockPlacement
683 if (MachineLoop *ExitLoop = MLI->getLoopFor(*SI)) {
909 for (MachineLoopInfo::iterator LI = MLI->begin(), LE = MLI->end(); LI != LE;
1065 MachineLoop *L = MLI->getLoopFor(*BI);
1111 MLI = &getAnalysis<MachineLoopInfo>();
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| H A D | MachineBasicBlock.cpp | 921 if (MachineLoopInfo *MLI = P->getAnalysisIfAvailable<MachineLoopInfo>())
922 if (MachineLoop *TIL = MLI->getLoopFor(this)) {
925 if (MachineLoop *DestLoop = MLI->getLoopFor(Succ)) {
928 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
931 TIL->addBasicBlockToLoop(NMBB, MLI->getBase());
934 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
943 P->addBasicBlockToLoop(NMBB, MLI->getBase());
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| H A D | MachineLICM.cpp | 74 MachineLoopInfo *MLI; // Current MachineLoopInfo member in class:__anon2143::MachineLICM
351 MLI = &getAnalysis<MachineLoopInfo>();
355 SmallVector<MachineLoop *, 8> Worklist(MLI->begin(), MLI->end());
511 const MachineLoop *ML = MLI->getLoopFor(BB);
705 const MachineLoop *ML = MLI->getLoopFor(BB);
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| H A D | MachineScheduler.cpp | 84 MF(0), MLI(0), MDT(0), PassConfig(0), AA(0), LIS(0) {
249 MLI = &getAnalysis<MachineLoopInfo>();
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| H A D | ScheduleDAGInstrs.cpp | 52 : ScheduleDAG(mf), MLI(mli), MDT(mdt), MFI(mf.getFrameInfo()), LIS(lis),
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| /freebsd-9.3-release/contrib/llvm/include/llvm/CodeGen/ |
| H A D | CalcSpillWeights.h | 71 const MachineLoopInfo &MLI,
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| H A D | DFAPacketizer.h | 111 MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT,
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| H A D | MachineScheduler.h | 101 const MachineLoopInfo *MLI; member in struct:llvm::MachineSchedContext
332 ScheduleDAGInstrs(*C->MF, *C->MLI, *C->MDT, /*IsPostRA=*/false, C->LIS),
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| H A D | ScheduleDAGInstrs.h | 78 const MachineLoopInfo &MLI; member in class:llvm::ScheduleDAGInstrs
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| /freebsd-9.3-release/contrib/llvm/lib/Target/R600/ |
| H A D | AMDILCFGStructurizer.cpp | 163 MLI = &getAnalysis<MachineLoopInfo>();
164 DEBUG(dbgs() << "LoopInfo:\n"; PrintLoopinfo(*MLI););
179 MachineLoopInfo *MLI; member in class:__anon2445::AMDGPUCFGStructurizer
365 MachineLoop *LoopRep = MLI->getLoopFor(MBB);
384 MachineLoop *LoopRep = MLI->getLoopFor(MBB);
752 for (MachineLoopInfo::iterator It = MLI->begin(),
753 E = MLI->end(); It != E; ++It) {
1077 for (MachineLoopInfo::iterator It = MLI->begin(), E = MLI->end();
1141 MLI
[all...] |
| H A D | R600Packetizer.cpp | 149 R600PacketizerList(MachineFunction &MF, MachineLoopInfo &MLI, argument
151 : VLIWPacketizerList(MF, MLI, MDT, true),
327 MachineLoopInfo &MLI = getAnalysis<MachineLoopInfo>(); local
331 R600PacketizerList Packetizer(Fn, MLI, MDT);
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| /freebsd-9.3-release/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonVLIWPacketizer.cpp | 120 HexagonPacketizerList(MachineFunction &MF, MachineLoopInfo &MLI,
186 MachineFunction &MF, MachineLoopInfo &MLI,MachineDominatorTree &MDT,
188 : VLIWPacketizerList(MF, MLI, MDT, true){
194 MachineLoopInfo &MLI = getAnalysis<MachineLoopInfo>(); local
199 HexagonPacketizerList Packetizer(Fn, MLI, MDT, MBPI);
185 HexagonPacketizerList( MachineFunction &MF, MachineLoopInfo &MLI,MachineDominatorTree &MDT, const MachineBranchProbabilityInfo *MBPI) argument
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| H A D | HexagonHardwareLoops.cpp | 64 MachineLoopInfo *MLI; member in struct:__anon2363::HexagonHardwareLoops
301 MLI = &getAnalysis<MachineLoopInfo>();
308 for (MachineLoopInfo::iterator I = MLI->begin(), E = MLI->end();
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| H A D | HexagonMachineScheduler.cpp | 148 << " at loop depth " << MLI.getLoopDepth(BB)
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| /freebsd-9.3-release/sys/dev/hptrr/ |
| H A D | amd64-elf.hptrr_lib.o.uu | 3885 MB?(/MLI(:<GX#0``2(V,.;@````/ML)(B4S'*$B)>3!`B#''00@`````0`^V
7353 M"`%$B'@01(AX$4B+5"1@2(E0%$B+5"1H2(E0'`^V52@/MLI$B'PI&/_"B%4H
7372 M%$B+5"1H2(E0'`^V52@/MLI$B'PI&/_"B%4H2(M5`/Z"^!,```^VLO@3``")
|