Searched refs:isLittle (Results 1 - 24 of 24) sorted by relevance

/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsTargetMachine.cpp65 bool isLittle) {
70 if (isLittle)
117 bool isLittle)
118 : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT,
121 isLittle(isLittle), TLOF(std::make_unique<MipsTargetObjectFile>()),
124 DefaultSubtarget(TT, CPU, FS, isLittle, *this,
127 isLittle, *this,
130 isLittle, *this,
207 TargetTriple, CPU, FS, isLittle, *thi
63 computeDataLayout(const Triple &TT, StringRef CPU, const TargetOptions &Options, bool isLittle) argument
111 MipsTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT, bool isLittle) argument
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H A DMipsTargetMachine.h28 bool isLittle; member in class:llvm::MipsTargetMachine
43 CodeGenOpt::Level OL, bool JIT, bool isLittle);
66 bool isLittleEndian() const { return isLittle; }
H A DMipsAsmPrinter.cpp592 RegOp = (Subtarget->isLittle()) ? OpNum + 1 : OpNum;
595 RegOp = (Subtarget->isLittle()) ? OpNum : OpNum + 1;
643 if (Subtarget->isLittle())
647 if (!Subtarget->isLittle())
H A DMipsISelDAGToDAG.cpp241 8, !Subtarget->isLittle()))
H A DMipsSubtarget.h281 bool isLittle() const { return IsLittle; } function in class:llvm::MipsSubtarget
H A DMipsSEFrameLowering.cpp324 if (!Subtarget.isLittle())
375 int64_t Offset = 4 * (Subtarget.isLittle() ? N : (1 - N));
468 if (!STI.isLittle())
484 if (!STI.isLittle())
H A DMipsISelLowering.cpp1796 if (Subtarget.isLittle()) {
1983 if (Subtarget.isLittle()) {
2320 if (!Subtarget.isLittle() && ArgSizeInBytes < ArgSlotSizeInBytes) {
2690 bool IsLittle = Subtarget.isLittle();
2812 return lowerUnalignedIntStore(SD, DAG, Subtarget.isLittle());
2882 if (ArgFlags.isInReg() && !Subtarget.isLittle()) {
3284 FirstByValReg, LastByValReg, Flags, Subtarget.isLittle(),
3305 if (!Subtarget.isLittle())
3699 if (!Subtarget.isLittle())
4386 unsigned LastReg, const ISD::ArgFlagsTy &Flags, bool isLittle,
4381 passByValArg( SDValue Chain, const SDLoc &DL, std::deque<std::pair<unsigned, SDValue>> &RegsToPass, SmallVectorImpl<SDValue> &MemOpChains, SDValue StackPtr, MachineFrameInfo &MFI, SelectionDAG &DAG, SDValue Arg, unsigned FirstReg, unsigned LastReg, const ISD::ArgFlagsTy &Flags, bool isLittle, const CCValAssign &VA) const argument
[all...]
H A DMipsCallLowering.cpp143 bool IsEL = STI.isLittle();
244 bool IsEL = STI.isLittle();
H A DMipsSEISelLowering.cpp616 bool IsLittleEndian = !Subtarget.isLittle();
860 EltSize, !Subtarget.isLittle()) ||
1195 if (!Subtarget.isLittle())
1218 if (!Subtarget.isLittle())
1667 !Subtarget.isLittle());
1703 !Subtarget.isLittle());
2473 !Subtarget.isLittle()) && SplatBitSize <= 64) {
H A DMipsSEISelDAGToDAG.cpp526 MinSizeInBits, !Subtarget->isLittle()))
1069 !Subtarget->isLittle()))
H A DMipsISelLowering.h591 const ISD::ArgFlagsTy &Flags, bool isLittle,
H A DMipsExpandPseudo.cpp463 if (STI->isLittle()) {
H A DMipsFastISel.cpp1256 if (ArgSize < 8 && !Subtarget->isLittle())
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMTargetMachine.h38 bool isLittle; member in class:llvm::ARMBaseTargetMachine
45 CodeGenOpt::Level OL, bool isLittle);
53 bool isLittleEndian() const { return isLittle; }
H A DARMTargetMachine.cpp134 bool isLittle) {
138 if (isLittle)
213 CodeGenOpt::Level OL, bool isLittle)
214 : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT,
218 TLOF(createTLOF(getTargetTriple())), isLittle(isLittle) {
295 I = std::make_unique<ARMSubtarget>(TargetTriple, CPU, FS, *this, isLittle,
132 computeDataLayout(const Triple &TT, StringRef CPU, const TargetOptions &Options, bool isLittle) argument
208 ARMBaseTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool isLittle) argument
H A DARMCallLowering.cpp162 bool IsLittle = MIRBuilder.getMF().getSubtarget<ARMSubtarget>().isLittle();
387 bool IsLittle = MIRBuilder.getMF().getSubtarget<ARMSubtarget>().isLittle();
H A DARMSubtarget.h824 bool isLittle() const { return IsLittle; } function in class:llvm::ARMSubtarget
H A DARMParallelDSP.cpp287 if (!ST->isLittle()) {
H A DARMISelLowering.cpp2106 if (!Subtarget->isLittle())
2123 if (!Subtarget->isLittle())
2181 unsigned id = Subtarget->isLittle() ? 0 : 1;
2945 bool isLittleEndian = Subtarget->isLittle();
4105 if (!Subtarget->isLittle())
12553 if (!Subtarget->isLittle())
13652 if (ST->isLittle())
16130 if (Subtarget->hasNEON() && (AllowsUnaligned || Subtarget->isLittle())) {
16928 Subtarget->isLittle(), Base, Offset, isInc, DAG);
17005 Subtarget->isLittle(), Bas
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H A DARMExpandPseudoInsts.cpp1300 if (STI->isLittle()) {
H A DARMISelDAGToDAG.cpp1772 bool CanChangeType = Subtarget->isLittle() && !isa<MaskedLoadSDNode>(N);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64TargetMachine.h61 bool isLittle; member in class:llvm::AArch64TargetMachine
H A DAArch64TargetMachine.cpp279 TLOF(createTLOF(getTargetTriple())), isLittle(LittleEndian) {
348 isLittle);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/AsmParser/
H A DMipsAsmParser.cpp733 bool isLittle() const { return IsLittleEndian; } function in class:__anon4201::MipsAsmParser
4406 if (isLittle())
4456 if (isLittle())
4497 if (isLittle())

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