Searched refs:i16 (Results 1 - 25 of 80) sorted by relevance

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/freebsd-13-stable/cddl/contrib/opensolaris/cmd/dtrace/test/tst/common/aggs/
H A Dtst.signedkeyspos.d66 @i16["mouse", (short)-2] = sum(-2);
67 @i16["dog", (short)-2] = sum(-22);
68 @i16["cat", (short)-2] = sum(-222);
69 @i16["mouse", (short)-1] = sum(-1);
70 @i16["dog", (short)-1] = sum(-11);
71 @i16["cat", (short)-1] = sum(-111);
72 @i16["mouse", (short)0] = sum(0);
73 @i16["dog", (short)0] = sum(10);
74 @i16["cat", (short)0] = sum(100);
75 @i16["mous
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H A Dtst.signedkeys.d101 @i16[(short)-2] = sum(-2);
102 @i16[(short)-1] = sum(-1);
103 @i16[(short)0] = sum(0);
104 @i16[(short)1] = sum(1);
105 @i16[(short)2] = sum(2);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelDAGToDAG.cpp253 AM.Base.Reg = CurDAG->getRegister(MSP430::SR, MVT::i16);
263 MVT::i16, AM.Disp,
266 Disp = CurDAG->getTargetConstantPool(AM.CP, MVT::i16, AM.Alignment, AM.Disp,
269 Disp = CurDAG->getTargetExternalSymbol(AM.ES, MVT::i16, 0/*AM.SymbolFlags*/);
271 Disp = CurDAG->getTargetJumpTable(AM.JT, MVT::i16, 0/*AM.SymbolFlags*/);
276 Disp = CurDAG->getTargetConstant(AM.Disp, SDLoc(N), MVT::i16);
312 case MVT::i16:
337 case MVT::i16:
345 CurDAG->getMachineNode(Opcode, SDLoc(N), VT, MVT::i16, MVT::Other,
360 unsigned Opc = (VT == MVT::i16
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H A DMSP430ISelLowering.cpp51 addRegisterClass(MVT::i16, &MSP430::GR16RegClass);
63 setIndexedLoadAction(ISD::POST_INC, MVT::i16, Legal);
70 setLoadExtAction(ISD::SEXTLOAD, VT, MVT::i16, Expand);
74 setTruncStoreAction(MVT::i16, MVT::i8, Expand);
79 setOperationAction(ISD::SRA, MVT::i16, Custom);
80 setOperationAction(ISD::SHL, MVT::i16, Custom);
81 setOperationAction(ISD::SRL, MVT::i16, Custom);
84 setOperationAction(ISD::ROTL, MVT::i16, Expand);
85 setOperationAction(ISD::ROTR, MVT::i16, Expand);
86 setOperationAction(ISD::GlobalAddress, MVT::i16, Custo
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelLowering.cpp40 addRegisterClass(MVT::i16, &AVR::DREGSRegClass);
51 setOperationAction(ISD::GlobalAddress, MVT::i16, Custom);
52 setOperationAction(ISD::BlockAddress, MVT::i16, Custom);
57 setOperationAction(ISD::DYNAMIC_STACKALLOC, MVT::i16, Expand);
66 setTruncStoreAction(MVT::i16, MVT::i8, Expand);
85 setOperationAction(ISD::SRA, MVT::i16, Custom);
86 setOperationAction(ISD::SHL, MVT::i16, Custom);
87 setOperationAction(ISD::SRL, MVT::i16, Custom);
88 setOperationAction(ISD::SHL_PARTS, MVT::i16, Expand);
89 setOperationAction(ISD::SRA_PARTS, MVT::i16, Expan
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H A DAVRISelDAGToDAG.cpp100 Disp = CurDAG->getTargetConstant(RHSC, dl, MVT::i16);
110 if (isUInt<6>(RHSC) && (VT == MVT::i8 || VT == MVT::i16)) {
147 case MVT::i16: {
188 case MVT::i16: {
319 CurDAG->getTargetConstant(0, SDLoc(N), MVT::i16));
345 SDValue Offset = CurDAG->getTargetConstant(CST, DL, MVT::i16);
347 unsigned Opc = (VT == MVT::i16) ? AVR::STDWSPQRr : AVR::STDSPQRr;
378 Ptr = CurDAG->getCopyFromReg(Chain, DL, AVR::R31R30, MVT::i16,
381 SDValue RegZ = CurDAG->getRegister(AVR::R31R30, MVT::i16);
386 ResNode = CurDAG->getMachineNode(LPMOpc, DL, VT, MVT::i16, MV
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/freebsd-13-stable/contrib/netbsd-tests/include/
H A Dt_inttypes.c41 int16_t i16 = 0; local
75 PRINT(PRId16, i16);
90 PRINT(PRIi16, i16);
166 SCAN(SCNd16, i16);
181 SCAN(SCNi16, i16);
/freebsd-13-stable/cddl/contrib/opensolaris/cmd/dtrace/test/tst/common/typedef/
H A Dtst.TypedefDataAssign.d85 new_int16 i16;
/freebsd-13-stable/contrib/netbsd-tests/ipf/
H A Dt_filter_parse.sh101 test_case i16 itest text ipf
127 atf_add_test_case i16
/freebsd-13-stable/sys/dev/bhnd/nvram/
H A Dbhnd_nvram_data_spromvar.h165 int16_t i16[BHND_SPROM_ARRAY_MAXLEN]; member in union:bhnd_nvram_sprom_storage
H A Dbhnd_nvram_value.h232 int16_t i16[4]; /**< 16-bit signed data */ member in union:bhnd_nvram_val::__anon11628
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp294 if (VT == MVT::i8 || VT == MVT::i16 || VT == MVT::i32) {
485 case MVT::i16:
639 case MVT::i16:
846 if (SrcVT == MVT::i64 || SrcVT == MVT::i32 || SrcVT == MVT::i16 ||
918 case MVT::i16:
1082 if (SrcVT != MVT::i8 && SrcVT != MVT::i16 &&
1120 if (SrcVT == MVT::i8 || SrcVT == MVT::i16) {
1277 if (DestVT != MVT::i16 && DestVT != MVT::i8)
1517 if (RetVT == MVT::i8 || RetVT == MVT::i16 || RetVT == MVT::i32)
1537 } else if (RetVT == MVT::i8 || RetVT == MVT::i16 || RetV
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMTargetTransformInfo.cpp193 {ISD::SIGN_EXTEND, MVT::i32, MVT::i16, 0},
194 {ISD::ZERO_EXTEND, MVT::i32, MVT::i16, 0},
197 {ISD::SIGN_EXTEND, MVT::i16, MVT::i8, 0},
198 {ISD::ZERO_EXTEND, MVT::i16, MVT::i8, 0},
201 {ISD::SIGN_EXTEND, MVT::i64, MVT::i16, 1},
202 {ISD::ZERO_EXTEND, MVT::i64, MVT::i16, 1},
423 { ISD::FP_TO_SINT, MVT::i16, MVT::f32, 2 },
424 { ISD::FP_TO_UINT, MVT::i16, MVT::f32, 2 },
425 { ISD::FP_TO_SINT, MVT::i16, MVT::f64, 2 },
426 { ISD::FP_TO_UINT, MVT::i16, MV
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H A DARMFastISel.cpp460 if (VT != MVT::i32 && VT != MVT::i16 && VT != MVT::i8 && VT != MVT::i1)
693 if (VT == MVT::i1 || VT == MVT::i8 || VT == MVT::i16)
811 case MVT::i16:
929 case MVT::i16:
1070 case MVT::i16:
1358 if (SrcVT == MVT::i32 || SrcVT == MVT::i16 || SrcVT == MVT::i8 ||
1394 case MVT::i16:
1421 // We have i1, i8, or i16, we need to either zero extend or sign extend.
1538 if (SrcVT != MVT::i32 && SrcVT != MVT::i16 && SrcVT != MVT::i8)
1545 if (SrcVT == MVT::i16 || SrcV
[all...]
/freebsd-13-stable/sys/contrib/octeon-sdk/
H A Dcvmx-fau.h301 uint64_t i16; member in union:__anon10105
304 result.i16 = cvmx_read64_int16(__cvmx_fau_atomic_address(1, reg, value));
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsFastISel.cpp357 if (VT != MVT::i32 && VT != MVT::i16 && VT != MVT::i8 && VT != MVT::i1)
617 if (VT == MVT::i1 || VT == MVT::i8 || VT == MVT::i16)
629 if (VT == MVT::i8 || VT == MVT::i16)
768 case MVT::i16:
822 case MVT::i16:
1180 if (((ArgVT == MVT::i32) || (ArgVT == MVT::f32) || (ArgVT == MVT::i16) ||
1295 if (RetVT == MVT::i1 || RetVT == MVT::i8 || RetVT == MVT::i16)
1375 case MVT::i16:
1380 LLVM_DEBUG(dbgs() << ".. .. gave up (i8/i16 arg is not extended)\n");
1530 !(VT == MVT::i1 || VT == MVT::i8 || VT == MVT::i16))
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/freebsd-13-stable/sys/contrib/zstd/doc/educational_decoder/
H A Dzstd_decompress.c66 typedef int16_t i16; typedef
244 const i16 *const norm_freqs, const int num_symbs,
960 static const i16 SEQ_LITERAL_LENGTH_DEFAULT_DIST[36] = {
963 static const i16 SEQ_OFFSET_DEFAULT_DIST[29] = {
966 static const i16 SEQ_MATCH_LENGTH_DEFAULT_DIST[53] = {
1177 const i16 *const default_distributions[] = {SEQ_LITERAL_LENGTH_DEFAULT_DIST,
1193 const i16 *distribution = default_distributions[type];
2107 const i16 *const norm_freqs, const int num_symbs,
2230 i16 frequencies[FSE_MAX_SYMBS];
2253 const i16 prob
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/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/Support/
H A DMachineValueType.h42 i16 = 4, // This is a 16 bit integer value
83 v1i16 = 35, // 1 x i16
84 v2i16 = 36, // 2 x i16
85 v3i16 = 37, // 3 x i16
86 v4i16 = 38, // 4 x i16
87 v8i16 = 39, // 8 x i16
88 v16i16 = 40, // 16 x i16
89 v32i16 = 41, // 32 x i16
90 v64i16 = 42, // 64 x i16
91 v128i16 = 43, //128 x i16
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp335 case MVT::i16:
998 /// simple value type such as i1, i8, and i16.
1008 if (VT == MVT::i1 || VT == MVT::i8 || VT == MVT::i16)
1173 case MVT::i16:
1495 case MVT::i16:
1682 if (RetVT >= MVT::i8 && RetVT <= MVT::i16) {
1707 case MVT::i16:
1728 if (RetVT >= MVT::i8 && RetVT <= MVT::i16 && ISDOpc != ISD::AND) {
1758 case MVT::i16:
1771 if (RetVT >= MVT::i8 && RetVT <= MVT::i16) {
[all...]
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyFastISel.cpp125 case MVT::i16:
453 case MVT::i16:
483 case MVT::i16:
666 case MVT::i16:
778 case MVT::i16:
902 case MVT::i16:
1169 case MVT::i16:
1227 case MVT::i16:
1313 case MVT::i16:
/freebsd-13-stable/sys/contrib/openzfs/cmd/zed/
H A Dzed_event.c637 uint16_t i16; local
669 (void) nvpair_value_int16(nvp, (int16_t *)&i16);
670 _zed_event_add_var(eid, zsp, prefix, name, "%d", i16);
673 (void) nvpair_value_uint16(nvp, &i16);
674 _zed_event_add_var(eid, zsp, prefix, name, "%u", i16);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIISelLowering.cpp166 addRegisterClass(MVT::i16, &AMDGPU::SReg_32RegClass);
523 setOperationAction(ISD::Constant, MVT::i16, Legal);
525 setOperationAction(ISD::SMIN, MVT::i16, Legal);
526 setOperationAction(ISD::SMAX, MVT::i16, Legal);
528 setOperationAction(ISD::UMIN, MVT::i16, Legal);
529 setOperationAction(ISD::UMAX, MVT::i16, Legal);
531 setOperationAction(ISD::SIGN_EXTEND, MVT::i16, Promote);
532 AddPromotedToType(ISD::SIGN_EXTEND, MVT::i16, MVT::i32);
534 setOperationAction(ISD::ROTR, MVT::i16, Promote);
535 setOperationAction(ISD::ROTL, MVT::i16, Promot
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp315 Segment = CurDAG->getRegister(0, MVT::i16);
1566 AM.Segment = CurDAG->getRegister(X86::GS, MVT::i16);
1569 AM.Segment = CurDAG->getRegister(X86::FS, MVT::i16);
2408 AM.Segment = CurDAG->getRegister(X86::GS, MVT::i16);
2410 AM.Segment = CurDAG->getRegister(X86::FS, MVT::i16);
2412 AM.Segment = CurDAG->getRegister(X86::SS, MVT::i16);
2450 AM.Segment = CurDAG->getRegister(X86::GS, MVT::i16);
2452 AM.Segment = CurDAG->getRegister(X86::FS, MVT::i16);
2454 AM.Segment = CurDAG->getRegister(X86::SS, MVT::i16);
3041 if (MemVT != MVT::i64 && MemVT != MVT::i32 && MemVT != MVT::i16
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H A DX86SelectionDAGInfo.cpp128 AVT = MVT::i16;
223 return MVT::i16;
H A DX86FastISel.cpp338 case MVT::i16:
508 case MVT::i16: Opc = X86::MOV16mr; break;
673 case MVT::i16: Opc = X86::MOV16mi; break;
1223 if (SrcVT != MVT::i1 && SrcVT != MVT::i8 && SrcVT != MVT::i16)
1340 case MVT::i16: return X86::CMP16rr;
1366 case MVT::i16:
1538 case MVT::i16: MovInst = X86::MOVZX32rr16; break;
1551 } else if (DstVT == MVT::i16) {
1552 // i8->i16 doesn't exist in the autogenerated isel table. Need to zero
1558 ResultReg = fastEmitInst_extractsubreg(MVT::i16, Result3
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