Searched refs:getRegisterBitWidth (Results 1 - 25 of 25) sorted by relevance

/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/VE/
H A DVETargetTransformInfo.h43 unsigned getRegisterBitWidth(bool Vector) const { return 64; } function in class:llvm::VETTIImpl
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyTargetTransformInfo.cpp39 unsigned WebAssemblyTTIImpl::getRegisterBitWidth(bool Vector) const { function in class:WebAssemblyTTIImpl
H A DWebAssemblyTargetTransformInfo.h57 unsigned getRegisterBitWidth(bool Vector) const;
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXTargetTransformInfo.h71 unsigned getRegisterBitWidth(bool Vector) const { return 32; } function in class:llvm::NVPTXTTIImpl
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonTargetTransformInfo.h84 unsigned getRegisterBitWidth(bool Vector) const;
H A DHexagonTargetTransformInfo.cpp111 unsigned HexagonTTIImpl::getRegisterBitWidth(bool Vector) const { function in class:HexagonTTIImpl
172 unsigned RegWidth = getRegisterBitWidth(true);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCTargetTransformInfo.h90 unsigned getRegisterBitWidth(bool Vector) const;
H A DPPCTargetTransformInfo.cpp661 unsigned PPCTTIImpl::getRegisterBitWidth(bool Vector) const { function in class:PPCTTIImpl
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZTargetTransformInfo.h64 unsigned getRegisterBitWidth(bool Vector) const;
H A DSystemZTargetTransformInfo.cpp325 unsigned SystemZTTIImpl::getRegisterBitWidth(bool Vector) const { function in class:SystemZTTIImpl
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUTargetTransformInfo.h163 unsigned getRegisterBitWidth(bool Vector) const;
277 unsigned getRegisterBitWidth(bool Vector) const;
H A DAMDGPUTargetTransformInfo.cpp262 unsigned GCNTTIImpl::getRegisterBitWidth(bool Vector) const { function in class:GCNTTIImpl
1017 unsigned R600TTIImpl::getRegisterBitWidth(bool Vector) const {
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMTargetTransformInfo.h148 unsigned getRegisterBitWidth(bool Vector) const { function in class:llvm::ARMTTIImpl
H A DMVETailPredication.cpp283 unsigned MaxWidth = TTI->getRegisterBitWidth(true);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64TargetTransformInfo.h99 unsigned getRegisterBitWidth(bool Vector) const { function in class:llvm::AArch64TTIImpl
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86TargetTransformInfo.h117 unsigned getRegisterBitWidth(bool Vector) const;
H A DX86TargetTransformInfo.cpp132 unsigned X86TTIImpl::getRegisterBitWidth(bool Vector) const { function in class:X86TTIImpl
151 return getRegisterBitWidth(true);
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/Analysis/
H A DTargetTransformInfo.h879 unsigned getRegisterBitWidth(bool Vector) const;
1376 virtual unsigned getRegisterBitWidth(bool Vector) const = 0;
1750 unsigned getRegisterBitWidth(bool Vector) const override {
1751 return Impl.getRegisterBitWidth(Vector);
H A DTargetTransformInfoImpl.h324 unsigned getRegisterBitWidth(bool Vector) const { return 32; } function in class:llvm::TargetTransformInfoImplBase
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Analysis/
H A DTargetTransformInfo.cpp581 unsigned TargetTransformInfo::getRegisterBitWidth(bool Vector) const { function in class:TargetTransformInfo
582 return TTIImpl->getRegisterBitWidth(Vector);
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DLowerMatrixIntrinsics.cpp412 double(TTI.getRegisterBitWidth(true)));
1012 TTI.getRegisterBitWidth(true) /
1176 std::max<unsigned>(TTI.getRegisterBitWidth(true) /
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/
H A DTypePromotion.cpp954 RegisterBitWidth = TII.getRegisterBitWidth(false);
/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DBasicTTIImpl.h533 unsigned getRegisterBitWidth(bool Vector) const { return 32; } function in class:llvm::BasicTTIImplBase
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Transforms/Vectorize/
H A DLoopVectorize.cpp5063 unsigned WidestRegister = TTI.getRegisterBitWidth(true);
5494 std::min(TTI.getRegisterBitWidth(true), MaxSafeDepDist);
6540 VF = determineVPlanVF(TTI->getRegisterBitWidth(true /* Vector*/), CM);
H A DSLPVectorizer.cpp555 MaxVecRegSize = TTI->getRegisterBitWidth(true);

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