/freebsd-13-stable/lib/libc/powerpc/gen/ |
H A D | _setjmp.S | 63 stfd %f16,112+2*8(%r3) 90 lfd %f16,112+2*8(%r3)
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H A D | setjmp.S | 73 stfd %f16,112+2*8(%r6) 101 lfd %f16,112+2*8(%r3)
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H A D | sigsetjmp.S | 78 stfd %f16,112+2*8(%r6) 105 lfd %f16,112+2*8(%r3)
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/freebsd-13-stable/contrib/llvm-project/compiler-rt/lib/builtins/ppc/ |
H A D | restFP.S | 24 lfd f16,-128(r1)
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H A D | saveFP.S | 22 stfd f16,-128(r1)
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/freebsd-13-stable/crypto/openssl/crypto/aes/asm/ |
H A D | aest4-sparcv9.pl | 134 ldd [$key + 32], %f16 145 aes_eround01 %f16, %f4, %f2, %f0 147 ldd [$key + 16], %f16 155 aes_eround01_l %f16, %f4, %f2, %f0 212 ldd [$key + 32], %f16 223 aes_dround01 %f16, %f4, %f2, %f0 225 ldd [$key + 16], %f16 233 aes_dround01_l %f16, %f4, %f2, %f0 606 aes_eround01 %f16, %f0, %f2, %f4 608 ldd [$key + 208], %f16 [all...] |
/freebsd-13-stable/crypto/openssl/crypto/camellia/asm/ |
H A D | cmllt4-sparcv9.pl | 101 ldd [$key + 32], %f16 118 camellia_f %f16, %f2, %f0, %f2 119 ldd [$key + 16], %f16 136 camellia_f %f16, %f2, %f0, %f2 196 ldd [$key - 24], %f16 213 camellia_f %f16, %f2, %f0, %f2 214 ldd [$key - 24], %f16 231 camellia_f %f16, %f2, %f0, %f2 347 ldd [%o4 + 0], %f16 352 camellia_f %f16, [all...] |
/freebsd-13-stable/contrib/llvm-project/compiler-rt/lib/tsan/rtl/ |
H A D | tsan_ppc_regs.h | 49 #define f16 16 macro
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/freebsd-13-stable/contrib/llvm-project/compiler-rt/lib/xray/ |
H A D | xray_trampoline_mips64.S | 39 sdc1 $f16, 32($sp) 66 ldc1 $f16, 32($sp)
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/freebsd-13-stable/contrib/netbsd-tests/ipf/ |
H A D | t_filter_exec.sh | 126 test_case f16 mtest text text 159 atf_add_test_case f16
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/freebsd-13-stable/usr.sbin/bsdconfig/console/ |
H A D | font | 143 f8= f14= f16= mc_start= 146 f8="NO" f14="NO" f16="NO" ;; 148 f8="cp437-8x8" f14="cp437-8x14" f16="cp437-8x16" ;; 150 f8="cp850-8x8" f14="cp850-8x14" f16="cp850-8x16" ;; 152 f8="cp865-8x8" f14="cp865-8x14" f16="cp865-8x16" ;; 154 f8="cp866-8x8" f14="cp866-8x14" f16="cp866b-8x16" mc_start="3" ;; 156 f8="cp866u-8x8" f14="cp866u-8x14" f16="cp866u-8x16" mc_start="3" ;; 158 f8="cp1251-8x8" f14="cp1251-8x14" f16="cp1251-8x16" mc_start="3" ;; 160 f8="iso-8x8" f14="iso-8x14" f16="iso-8x16" ;; 162 f8="iso02-8x8" f14="iso02-8x14" f16 [all...] |
/freebsd-13-stable/lib/libc/powerpc64/gen/ |
H A D | _setjmp.S | 63 stfd %f16,40 + 25*8(%r3) 109 lfd %f16,40 + 25*8(%r3)
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H A D | setjmp.S | 74 stfd %f16,40 + 25*8(%r6) 124 lfd %f16,40 + 25*8(%r3)
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H A D | sigsetjmp.S | 79 stfd %f16,40 + 25*8(%r6) 126 lfd %f16,40 + 25*8(%r3)
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/freebsd-13-stable/crypto/openssl/crypto/des/asm/ |
H A D | dest4-sparcv9.pl | 78 des_kexpand %f14, 1, %f16 80 des_kexpand %f16, 3, %f20 82 des_kexpand %f16, 2, %f18 83 std %f16, [$out + 0x40] 133 ldd [$key + 0x30], %f16 164 des_round %f16, %f18, %f0, %f0 234 ldd [$key + 0x48], %f16 264 des_round %f16, %f18, %f0, %f0 342 ldd [$key + 0x30], %f16 373 des_round %f16, [all...] |
/freebsd-13-stable/sys/mips/include/ |
H A D | frame.h | 122 f_register_t f16; member in struct:trapframe
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/freebsd-13-stable/crypto/openssl/crypto/md5/asm/ |
H A D | md5-sparcv9.pl | 242 ldd [%o1 + 0x20], %f16 272 ldd [%o1 + 0x18], %f16 284 faligndata %f14, %f16, %f12 285 faligndata %f16, %f18, %f14 286 faligndata %f18, %f20, %f16
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/freebsd-13-stable/crypto/openssl/crypto/sha/asm/ |
H A D | sha1-sparcv9.pl | 227 ldd [%o1 + 0x20], %f16 256 ldd [%o1 + 0x18], %f16 268 faligndata %f14, %f16, %f12 269 faligndata %f16, %f18, %f14 270 faligndata %f18, %f20, %f16
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H A D | sha512-sparcv9.pl | 501 ldd [%o1 + 0x00], %f16 565 faligndata %f18, %f20, %f16 607 ldd [%o1 + 0x20], %f16 639 ldd [%o1 + 0x18], %f16 651 faligndata %f14, %f16, %f12 652 faligndata %f16, %f18, %f14 653 faligndata %f18, %f20, %f16
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsSEISelLowering.cpp | 126 // f16 is a storage-only type, always promote it to f32. 127 addRegisterClass(MVT::f16, &Mips::MSA128HRegClass); 128 setOperationAction(ISD::SETCC, MVT::f16, Promote); 129 setOperationAction(ISD::BR_CC, MVT::f16, Promote); 130 setOperationAction(ISD::SELECT_CC, MVT::f16, Promote); 131 setOperationAction(ISD::SELECT, MVT::f16, Promote); 132 setOperationAction(ISD::FADD, MVT::f16, Promote); 133 setOperationAction(ISD::FSUB, MVT::f16, Promote); 134 setOperationAction(ISD::FMUL, MVT::f16, Promote); 135 setOperationAction(ISD::FDIV, MVT::f16, Promot [all...] |
/freebsd-13-stable/contrib/llvm-project/libunwind/src/ |
H A D | UnwindRegistersRestore.S | 456 lfd %f16,288(%r3) 876 ldc1 $f16, (4 * 36 + 8 * 16)($4) 901 ldc1 $f16, (4 * 36 + 8 * 16)($4) 992 ldc1 $f16, (8 * 51)($4) 1101 fld f16, (8 * 32 + 8 * 16)(a0)
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/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/Support/ |
H A D | MachineValueType.h | 51 f16 = 9, // This is a 16 bit floating point value 120 v2f16 = 65, // 2 x f16 121 v3f16 = 66, // 3 x f16 122 v4f16 = 67, // 4 x f16 123 v8f16 = 68, // 8 x f16 124 v16f16 = 69, // 16 x f16 125 v32f16 = 70, // 32 x f16 126 v64f16 = 71, // 64 x f16 127 v128f16 = 72, // 128 x f16 203 nxv1f16 = 133, // n x 1 x f16 [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | AMDGPUTargetTransformInfo.cpp | 515 if (ST->has16BitInsts() && SLT == MVT::f16) 518 if (SLT == MVT::f32 || SLT == MVT::f16) 537 (SLT == MVT::f16 && ST->has16BitInsts())) { 542 if (SLT == MVT::f16 && ST->has16BitInsts()) { 547 // f16 div_fixup 552 if (SLT == MVT::f32 || SLT == MVT::f16) { 614 if (ST->has16BitInsts() && SLT == MVT::f16)
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 188 // Vectors with an even number of f16 elements will be passed to 191 if (EltVT == MVT::f16 && NumElts % 2 == 0) { 365 addRegisterClass(MVT::f16, &NVPTX::Float16RegsRegClass); 369 setOperationAction(ISD::SINT_TO_FP, MVT::f16, Legal); 370 setOperationAction(ISD::FP_TO_SINT, MVT::f16, Legal); 376 setFP16OperationAction(ISD::SETCC, MVT::f16, Legal, Promote); 380 for (MVT VT : {MVT::f16, MVT::v2f16, MVT::f32, MVT::f64, MVT::i1, MVT::i8, 433 setLoadExtAction(ISD::EXTLOAD, MVT::f32, MVT::f16, Expand); 434 setLoadExtAction(ISD::EXTLOAD, MVT::f64, MVT::f16, Expand); 444 setTruncStoreAction(MVT::f32, MVT::f16, Expan [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | TargetLoweringBase.cpp | 166 // For f16/f32 conversions, Darwin uses the standard naming scheme, instead 224 if (OpVT == MVT::f16) { 250 if (RetVT == MVT::f16) { 742 setOperationAction(ISD::ConstantFP, MVT::f16, Expand); 1243 // Decide how to handle f16. If the target does not have native f16 support, 1244 // promote it to f32, because there are no f16 library calls (except for 1246 if (!isTypeLegal(MVT::f16)) { 1249 NumRegistersForVT[MVT::f16] = NumRegistersForVT[MVT::i16]; 1250 RegisterTypeForVT[MVT::f16] [all...] |