Searched refs:__BITS (Results 1 - 15 of 15) sorted by relevance
/freebsd-13-stable/sys/dev/bwi/ |
H A D | if_bwireg.h | 47 #define BWI_FLAGS_INTR_MASK __BITS(5, 0) 64 #define BWI_STATE_LO_FLAGS_MASK __BITS(29, 18) 72 #define BWI_STATE_HI_FLAGS_MASK __BITS(28, 16) 75 #define BWI_CONF_LO_SERVTO_MASK __BITS(2, 0) /* service timeout */ 77 #define BWI_CONF_LO_REQTO_MASK __BITS(6, 4) /* request timeout */ 81 #define BWI_ID_LO_BUSREV_MASK __BITS(31, 28) 89 #define BWI_ID_HI_REGWIN_VENDOR_MASK __BITS(31, 16) 95 #define BWI_INFO_BBPID_MASK __BITS(15, 0) 96 #define BWI_INFO_BBPREV_MASK __BITS(19, 16) 97 #define BWI_INFO_BBPPKG_MASK __BITS(2 [all...] |
H A D | bitops.h | 44 * __BITS(m, n): Return a bitmask with bits m through n, inclusive, 72 /* __BITS(m, n): bits m through n, m < n. */ 73 #define __BITS(__m, __n) \ macro
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H A D | if_bwivar.h | 130 #define BWI_DESC32_A_FUNC_MASK __BITS(31, 30) 131 #define BWI_DESC32_A_ADDR_MASK __BITS(29, 0) 133 #define BWI_DESC32_C_BUFLEN_MASK __BITS(12, 0) 134 #define BWI_DESC32_C_ADDRHI_MASK __BITS(17, 16) 170 #define BWI_RXH_PHYINFO_LNAGAIN __BITS(15, 14) 197 #define BWI_TXH_ID_RING_MASK __BITS(15, 13) 198 #define BWI_TXH_ID_IDX_MASK __BITS(12, 0) 202 #define BWI_TXH_PHY_C_ANTMODE_MASK __BITS(9, 8) 221 #define BWI_TXS_TXCNT_DATA __BITS(7, 4) 311 #define BWI_FW_IV_OFS_MASK __BITS(1 [all...] |
H A D | bwirf.h | 126 #define BWI_RFR_TXPWR1_MASK __BITS(6, 4) 130 #define BWI_RFR_BBP_ATTEN_CALIB_IDX __BITS(4, 1)
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H A D | bwirf.c | 165 #define NRSSI_11G_MASK __BITS(13, 8) 2210 #define NRSSI_THR1_MASK __BITS(5, 0) 2211 #define NRSSI_THR2_MASK __BITS(11, 6)
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H A D | bwiphy.c | 228 uint16_t mask = __BITS(3, 0);
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H A D | if_bwi.c | 2847 #define IEEE80211_OFDM_PLCP_RATE_MASK __BITS(3, 0) 2848 #define IEEE80211_OFDM_PLCP_LEN_MASK __BITS(16, 5)
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/freebsd-13-stable/sys/mips/atheros/ar531x/ |
H A D | ar5312reg.h | 72 #define AR5312_FLASHCTL_IDCY __BITS(0,3) /* idle cycle turn */ 73 #define AR5312_FLASHCTL_WST1 __BITS(5,9) /* wait state 1 */ 75 #define AR5312_FLASHCTL_WST2 __BITS(11,15) /* wait state 1 */ 76 #define AR5312_FLASHCTL_AC __BITS(16,18) /* addr chk */ 90 #define AR5312_FLASHCTL_MW __BITS(28,29) /* mem width */ 91 #define AR5312_FLASHCTL_AT __BITS(31,30) /* access type */ 147 #define AR5312_CLOCKCTL_PREDIVIDE __BITS(4,5) 148 #define AR5312_CLOCKCTL_MULTIPLIER __BITS(8,12) 152 #define AR2313_CLOCKCTL_PREDIVIDE __BITS(12,13) 153 #define AR2313_CLOCKCTL_MULTIPLIER __BITS(1 [all...] |
H A D | ar5315reg.h | 177 #define AR5315_MEM_CFG_DATA_WIDTH __BITS(13,14) 178 #define AR5315_MEM_CFG_COL_WIDTH __BITS(9,12) 179 #define AR5315_MEM_CFG_ROW_WIDTH __BITS(5,8) 182 #define AR531X_MEM_CFG1_BANK0 __BITS(8,10) 183 #define AR531X_MEM_CFG1_BANK1 __BITS(12,14) 235 /* __BITS(m, n): bits m through n, m < n. */ 236 #define __BITS(__m, __n) \ macro
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/freebsd-13-stable/sys/arm64/broadcom/genet/ |
H A D | if_genetreg.h | 41 #define SYS_REV_MAJOR __BITS(27,24) 42 #define SYS_REV_MINOR __BITS(19,16) 81 #ifdef __BITS 82 #define GENET_UMAC_CMD_SPEED __BITS(3,2) 108 #define GENET_MDIO_PMD __BITS(25,21) 109 #define GENET_MDIO_REG __BITS(20,16) 135 #define GENET_RX_DMA_RING_BUF_SIZE_DESC_COUNT __BITS(31,16) 136 #define GENET_RX_DMA_RING_BUF_SIZE_BUF_LENGTH __BITS(15,0) 144 #define GENET_RX_DMA_XON_XOFF_THRES_LO __BITS(31,16) 145 #define GENET_RX_DMA_XON_XOFF_THRES_HI __BITS(1 [all...] |
/freebsd-13-stable/lib/libnetbsd/sys/ |
H A D | cdefs.h | 81 /* __BITS(m, n): bits m through n, m < n. */ 82 #define __BITS(__m, __n) \ macro
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/freebsd-13-stable/sys/dev/qat/ |
H A D | qatreg.h | 68 #define __BITS(__m, __n) \ macro 167 #define ETR_RING_CONFIG_NEAR_FULL_WM __BITS(14, 10) 168 #define ETR_RING_CONFIG_NEAR_EMPTY_WM __BITS(9, 5) 169 #define ETR_RING_CONFIG_RING_SIZE __BITS(4, 0) 246 #define ETR_AP_DEST_AE __BITS(6, 2) 247 #define ETR_AP_DEST_MAILBOX __BITS(1, 0) 284 #define FCU_CTRL_AE __BITS(8, 31) 287 #define FCU_STATUS_STS __BITS(0, 2) 296 #define FCU_STATUS_LOADED_AE __BITS(22, 31) 312 #define CAP_GLOBAL_CTL_RESET_MASK __BITS(3 [all...] |
H A D | qat_hw15reg.h | 77 #define ARCH_IF_FLAGS_RESP_RING_TYPE __BITS(4, 3) 82 #define ARCH_IF_FLAGS_RESP_TYPE __BITS(2, 0) 538 #define LA_FLAGS_PROTO __BITS(8, 6) 547 #define LA_FLAGS_PARTIAL __BITS(1, 0)
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H A D | qat_hw17reg.h | 1231 #define FW_LA_PROTO __BITS(7, 9) 1264 #define FW_LA_PARTIAL __BITS(0, 1)
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/freebsd-13-stable/sys/arm/freescale/imx/ |
H A D | imx51_ipuv3reg.h | 341 #define DI_DW_GEN_PIN(n) __BITS(DI_DW_GEN_PIN_SHIFT(n) + 1, \
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