1/* SPDX-License-Identifier: BSD-2-Clause-NetBSD AND BSD-3-Clause */
2/*	$NetBSD: qat_hw15reg.h,v 1.1 2019/11/20 09:37:46 hikaru Exp $	*/
3
4/*
5 * Copyright (c) 2019 Internet Initiative Japan, Inc.
6 * All rights reserved.
7 *
8 * Redistribution and use in source and binary forms, with or without
9 * modification, are permitted provided that the following conditions
10 * are met:
11 * 1. Redistributions of source code must retain the above copyright
12 *    notice, this list of conditions and the following disclaimer.
13 * 2. Redistributions in binary form must reproduce the above copyright
14 *    notice, this list of conditions and the following disclaimer in the
15 *    documentation and/or other materials provided with the distribution.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
20 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
27 * POSSIBILITY OF SUCH DAMAGE.
28 */
29
30/*
31 *   Copyright(c) 2007-2013 Intel Corporation. All rights reserved.
32 *
33 *   Redistribution and use in source and binary forms, with or without
34 *   modification, are permitted provided that the following conditions
35 *   are met:
36 *
37 *     * Redistributions of source code must retain the above copyright
38 *       notice, this list of conditions and the following disclaimer.
39 *     * Redistributions in binary form must reproduce the above copyright
40 *       notice, this list of conditions and the following disclaimer in
41 *       the documentation and/or other materials provided with the
42 *       distribution.
43 *     * Neither the name of Intel Corporation nor the names of its
44 *       contributors may be used to endorse or promote products derived
45 *       from this software without specific prior written permission.
46 *
47 *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
48 *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
49 *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
50 *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
51 *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
52 *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
53 *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
54 *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
55 *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
56 *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
57 *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
58 */
59
60/* $FreeBSD$ */
61
62#ifndef _DEV_PCI_QAT_HW15REG_H_
63#define _DEV_PCI_QAT_HW15REG_H_
64
65/* Default message size in bytes */
66#define FW_REQ_DEFAULT_SZ_HW15		64
67#define FW_RESP_DEFAULT_SZ_HW15		64
68
69#define ADMIN_RING_SIZE		256
70#define RING_NUM_ADMIN_TX	0
71#define RING_NUM_ADMIN_RX	1
72
73/* -------------------------------------------------------------------------- */
74/* accel */
75
76#define ARCH_IF_FLAGS_VALID_FLAG		__BIT(7)
77#define ARCH_IF_FLAGS_RESP_RING_TYPE		__BITS(4, 3)
78#define  ARCH_IF_FLAGS_RESP_RING_TYPE_SHIFT	3
79#define  ARCH_IF_FLAGS_RESP_RING_TYPE_SCRATCH	(0 << ARCH_IF_FLAGS_RESP_RING_TYPE_SHIFT)
80#define  ARCH_IF_FLAGS_RESP_RING_TYPE_NN	(1 << ARCH_IF_FLAGS_RESP_RING_TYPE_SHIFT)
81#define  ARCH_IF_FLAGS_RESP_RING_TYPE_ET	(2 << ARCH_IF_FLAGS_RESP_RING_TYPE_SHIFT)
82#define ARCH_IF_FLAGS_RESP_TYPE			__BITS(2, 0)
83#define  ARCH_IF_FLAGS_RESP_TYPE_SHIFT		0
84#define   ARCH_IF_FLAGS_RESP_TYPE_A		(0 << ARCH_IF_FLAGS_RESP_TYPE_SHIFT)
85#define   ARCH_IF_FLAGS_RESP_TYPE_B		(1 << ARCH_IF_FLAGS_RESP_TYPE_SHIFT)
86#define   ARCH_IF_FLAGS_RESP_TYPE_C		(2 << ARCH_IF_FLAGS_RESP_TYPE_SHIFT)
87#define   ARCH_IF_FLAGS_RESP_TYPE_S		(3 << ARCH_IF_FLAGS_RESP_TYPE_SHIFT)
88
89enum arch_if_req {
90	ARCH_IF_REQ_NULL,		/* NULL request type */
91
92	/* QAT-AE Service Request Type IDs - 01 to 20 */
93	ARCH_IF_REQ_QAT_FW_INIT,	/* QAT-FW Initialization Request */
94	ARCH_IF_REQ_QAT_FW_ADMIN,	/* QAT-FW Administration Request */
95	ARCH_IF_REQ_QAT_FW_PKE,		/* QAT-FW PKE Request */
96	ARCH_IF_REQ_QAT_FW_LA,		/* QAT-FW Lookaside Request */
97	ARCH_IF_REQ_QAT_FW_IPSEC,	/* QAT-FW IPSec Request */
98	ARCH_IF_REQ_QAT_FW_SSL,		/* QAT-FW SSL Request */
99	ARCH_IF_REQ_QAT_FW_DMA,		/* QAT-FW DMA Request */
100	ARCH_IF_REQ_QAT_FW_STORAGE,	/* QAT-FW Storage Request */
101	ARCH_IF_REQ_QAT_FW_COMPRESS,	/* QAT-FW Compression Request */
102	ARCH_IF_REQ_QAT_FW_PATMATCH,	/* QAT-FW Pattern Matching Request */
103
104	/* IP Service (Range Match and Exception) Blocks Request Type IDs 21 - 30 */
105	ARCH_IF_REQ_RM_FLOW_MISS = 21,	/* RM flow miss request */
106	ARCH_IF_REQ_RM_FLOW_TIMER_EXP,	/* RM flow timer exp Request */
107	ARCH_IF_REQ_IP_SERVICES_RFC_LOOKUP_UPDATE, /* RFC Lookup request */
108	ARCH_IF_REQ_IP_SERVICES_CONFIG_UPDATE,	/* Config Update request */
109	ARCH_IF_REQ_IP_SERVICES_FCT_CONFIG,	/* FCT Config request */
110	ARCH_IF_REQ_IP_SERVICES_NEXT_HOP_TIMER_EXPIRY, /* NH Timer expiry request */
111	ARCH_IF_REQ_IP_SERVICES_EXCEPTION,	/* Exception processign request */
112	ARCH_IF_REQ_IP_SERVICES_STACK_DRIVER,	/* Send to SD request */
113	ARCH_IF_REQ_IP_SERVICES_ACTION_HANDLER,	/* Send to AH request */
114	ARCH_IF_REQ_IP_SERVICES_EVENT_HANDLER,	/* Send to EH request */
115	ARCH_IF_REQ_DELIMITER			/* End delimiter */
116};
117
118struct arch_if_req_hdr {
119	uint8_t resp_dest_id;
120	/* Opaque identifier passed from the request to response to allow
121	 * response handler perform any further processing */
122	uint8_t resp_pipe_id;
123	/* Response pipe to write the response associated with this request to */
124	uint8_t req_type;
125	/* Definition of the service described by the request */
126	uint8_t flags;
127	/* Request and response control flags */
128};
129
130struct arch_if_resp_hdr {
131	uint8_t dest_id;
132	/* Opaque identifier passed from the request to response to allow
133	 * response handler perform any further processing */
134	uint8_t serv_id;
135	/* Definition of the service id generating the response */
136	uint8_t resp_type;
137	/* Definition of the service described by the request */
138	uint8_t flags;
139	/* Request and response control flags */
140};
141
142struct fw_comn_req_hdr {
143	struct arch_if_req_hdr arch_if;
144	/* Common arch fields used by all ICP interface requests. Remaining
145	 * fields are specific to the common QAT FW service. */
146	uint16_t comn_req_flags;
147	/* Flags used to describe common processing required by the request and
148	 * the meaning of parameters in it i.e. differentiating between a buffer
149	 * descriptor and a flat buffer pointer in the source (src) and destination
150	 * (dest) data address fields. Full definition of the fields is given
151	 * below */
152	uint8_t content_desc_params_sz;
153	/* Size of the content descriptor parameters in quad words. These
154	 * parameters describe the session setup configuration info for the
155	 * slices that this request relies upon i.e. the configuration word and
156	 * cipher key needed by the cipher slice if there is a request for cipher
157	 * processing. The format of the parameters are contained in icp_qat_hw.h
158	 * and vary depending on the algorithm and mode being used. It is the
159	 * clients responsibility to ensure this structure is correctly packed */
160	uint8_t content_desc_hdr_sz;
161	/* Size of the content descriptor header in quad words. This information
162	 * is read into the QAT AE xfr registers */
163	uint64_t content_desc_addr;
164	/* Address of the content descriptor containing both the content header
165	 * the size of which is defined by content_desc_hdr_sz followed by the
166	 * content parameters whose size is described bycontent_desc_params_sz
167	 */
168};
169
170struct fw_comn_req_mid {
171	uint64_t opaque_data;
172	/* Opaque data passed unmodified from the request to response messages
173	 * by firmware (fw) */
174	uint64_t src_data_addr;
175	/* Generic definition of the source data supplied to the QAT AE. The
176	 * common flags are used to further describe the attributes of this
177	 * field */
178	uint64_t dest_data_addr;
179	/* Generic definition of the destination data supplied to the QAT AE.
180	 * The common flags are used to further describe the attributes of this
181	 * field */
182};
183
184union fw_comn_req_ftr {
185	uint64_t next_request_addr;
186	/* Overloaded field, for stateful requests, this field is the pointer to
187	   next request descriptor */
188	struct {
189		uint32_t src_length;
190		/* Length of source flat buffer incase src buffer type is flat */
191		uint32_t dst_length;
192		/* Length of source flat buffer incase dst buffer type is flat */
193	} s;
194};
195
196union fw_comn_error {
197	struct {
198		uint8_t resrvd;		/* 8 bit reserved field */
199		uint8_t comn_err_code;	/**< 8 bit common error code */
200	} s;
201	/* Structure which is used for non-compression responses */
202
203	struct {
204		uint8_t xlat_err_code;	/* 8 bit translator error field */
205		uint8_t cmp_err_code;	/* 8 bit compression error field */
206	} s1;
207	/* Structure which is used for compression responses */
208};
209
210struct fw_comn_resp_hdr {
211	struct arch_if_resp_hdr arch_if;
212	/* Common arch fields used by all ICP interface response messages. The
213	 * remaining fields are specific to the QAT FW */
214	union fw_comn_error comn_error;
215	/* This field is overloaded to allow for one 8 bit common error field
216	 * or two 8 bit error fields from compression and translator  */
217	uint8_t comn_status;
218	/* Status field which specifies which slice(s) report an error */
219	uint8_t serv_cmd_id;
220	/* For services that define multiple commands this field represents the
221	 * command. If only 1 command is supported then this field will be 0 */
222	uint64_t opaque_data;
223	/* Opaque data passed from the request to the response message */
224};
225
226
227#define RING_MASK_TABLE_ENTRY_LOG_SZ			(5)
228
229#define FW_INIT_RING_MASK_SET(table, id)			\
230		table->firt_ring_mask[id >> RING_MASK_TABLE_ENTRY_LOG_SZ] =\
231		table->firt_ring_mask[id >> RING_MASK_TABLE_ENTRY_LOG_SZ] | \
232		(1 << (id & 0x1f))
233
234struct fw_init_ring_params {
235	uint8_t firp_curr_weight;	/* Current ring weight (working copy),
236					 * has to be equal to init_weight */
237	uint8_t firp_init_weight;	/* Initial ring weight: -1 ... 0
238					 * -1 is equal to FF, -2 is equal to FE,
239					 * the weighting uses negative logic
240					 * where FF means poll the ring once,
241					 * -2 is poll the ring twice,
242					 * 0 is poll the ring 255 times */
243	uint8_t firp_ring_pvl;		/* Ring Privilege Level. */
244	uint8_t firp_reserved;		/* Reserved field which must be set
245					 * to 0 by the client */
246};
247
248#define INIT_RING_TABLE_SZ		128
249#define INIT_RING_TABLE_LW_SZ		4
250
251struct fw_init_ring_table {
252	struct fw_init_ring_params firt_bulk_rings[INIT_RING_TABLE_SZ];
253					/* array of ring parameters */
254	uint32_t firt_ring_mask[INIT_RING_TABLE_LW_SZ];
255					/* Structure to hold the bit masks for
256					 * 128 rings. */
257};
258
259struct fw_init_set_ae_info_hdr {
260	uint16_t init_slice_mask;	/* Init time flags to set the ownership of the slices */
261	uint16_t resrvd;		/* Reserved field and must be set to 0 by the client */
262	uint8_t init_qat_id;		/* Init time qat id described in the request */
263	uint8_t init_ring_cluster_id;	/* Init time ring cluster Id */
264	uint8_t init_trgt_id;		/* Init time target AE id described in the request */
265	uint8_t init_cmd_id;		/* Init time command that is described in the request */
266};
267
268struct fw_init_set_ae_info {
269	uint64_t init_shram_mask;	/* Init time shram mask to set the page ownership in page pool of AE*/
270	uint64_t resrvd;		/* Reserved field and must be set to 0 by the client */
271};
272
273struct fw_init_set_ring_info_hdr {
274	uint32_t resrvd;		/* Reserved field and must be set to 0 by the client */
275	uint16_t init_ring_tbl_sz;	/* Init time information to state size of the ring table */
276	uint8_t init_trgt_id;		/* Init time target AE id described in the request */
277	uint8_t init_cmd_id;		/* Init time command that is described in the request */
278};
279
280struct fw_init_set_ring_info {
281	uint64_t init_ring_table_ptr;	/* Pointer to weighting information for 128 rings  */
282	uint64_t resrvd;		/* Reserved field and must be set to 0 by the client */
283};
284
285struct fw_init_trng_hdr {
286	uint32_t resrvd;	/* Reserved field and must be set to 0 by the client */
287	union {
288		uint8_t resrvd;	/* Reserved field set to if cmd type is trng disable */
289		uint8_t init_trng_cfg_sz;	/* Size of the trng config word in QW*/
290	} u;
291	uint8_t resrvd1;	/* Reserved field and must be set to 0 by the client */
292	uint8_t init_trgt_id;	/* Init time target AE id described in the request */
293	uint8_t init_cmd_id;	/* Init time command that is described in the request */
294};
295
296struct fw_init_trng {
297	union {
298		uint64_t resrvd;	/* Reserved field set to 0 if cmd type is trng disable */
299		uint64_t init_trng_cfg_ptr;	/* Pointer to TRNG Slice config word*/
300	} u;
301	uint64_t resrvd;		/* Reserved field and must be set to 0 by the client */
302};
303
304struct fw_init_req {
305	struct fw_comn_req_hdr comn_hdr;	/* Common request header */
306	union {
307		struct fw_init_set_ae_info_hdr set_ae_info;
308		/* INIT SET_AE_INFO request header structure */
309		struct fw_init_set_ring_info_hdr set_ring_info;
310		/* INIT SET_RING_INFO request header structure */
311		struct fw_init_trng_hdr init_trng;
312		/* INIT TRNG ENABLE/DISABLE request header structure */
313	} u;
314	struct fw_comn_req_mid comn_mid;	/* Common request middle section */
315	union {
316		struct fw_init_set_ae_info set_ae_info;
317		/* INIT SET_AE_INFO request data structure */
318		struct fw_init_set_ring_info set_ring_info;
319		/* INIT SET_RING_INFO request data structure */
320		struct fw_init_trng init_trng;
321		/* INIT TRNG ENABLE/DISABLE request data structure */
322	} u1;
323};
324
325enum fw_init_cmd_id {
326	FW_INIT_CMD_SET_AE_INFO,	/* Setup AE Info command type */
327	FW_INIT_CMD_SET_RING_INFO,	/* Setup Ring Info command type */
328	FW_INIT_CMD_TRNG_ENABLE,	/* TRNG Enable command type */
329	FW_INIT_CMD_TRNG_DISABLE,	/* TRNG Disable command type */
330	FW_INIT_CMD_DELIMITER		/* Delimiter type */
331};
332
333struct fw_init_resp {
334	struct fw_comn_resp_hdr comn_resp;	/* Common interface response */
335	uint8_t resrvd[64 - sizeof(struct fw_comn_resp_hdr)];
336	/* XXX FW_RESP_DEFAULT_SZ_HW15 */
337	/* Reserved padding out to the default response size */
338};
339
340/* -------------------------------------------------------------------------- */
341/* look aside */
342
343#define COMN_REQ_ORD				UINT16_C(0x8000)
344#define  COMN_REQ_ORD_SHIFT			15
345#define   COMN_REQ_ORD_NONE			(0 << COMN_REQ_ORD_SHIFT)
346#define   COMN_REQ_ORD_STRICT			(1 << COMN_REQ_ORD_SHIFT)
347#define COMN_REQ_PTR_TYPE			UINT16_C(0x4000)
348#define  COMN_REQ_PTR_TYPE_SHIFT		14
349#define   COMN_REQ_PTR_TYPE_FLAT		(0 << COMN_REQ_PTR_TYPE_SHIFT)
350#define   COMN_REQ_PTR_TYPE_SGL			(1 << COMN_REQ_PTR_TYPE_SHIFT)
351#define COMN_REQ_RESERVED			UINT16_C(0x2000)
352#define COMN_REQ_SHRAM_INIT			UINT16_C(0x1000)
353#define  COMN_REQ_SHRAM_INIT_SHIFT		12
354#define  COMN_REQ_SHRAM_INIT_REQUIRED		(1 << COMN_REQ_SHRAM_INIT_SHIFT)
355#define COMN_REQ_REGEX_SLICE			UINT16_C(0x0800)
356#define  COMN_REQ_REGEX_SLICE_SHIFT		11
357#define   COMN_REQ_REGEX_SLICE_REQUIRED		(1 << COMN_REQ_REGEX_SLICE_SHIFT)
358#define COMN_REQ_XLAT_SLICE			UINT16_C(0x0400)
359#define  COMN_REQ_XLAT_SLICE_SHIFT		10
360#define   COMN_REQ_XLAT_SLICE_REQUIRED		(1 << COMN_REQ_XLAT_SLICE_SHIFT)
361#define COMN_REQ_CPR_SLICE			UINT16_C(0x0200)
362#define  COMN_REQ_CPR_SLICE_SHIFT		9
363#define   COMN_REQ_CPR_SLICE_REQUIRED		(1 << COMN_REQ_CPR_SLICE_SHIFT)
364#define COMN_REQ_BULK_SLICE			UINT16_C(0x0100)
365#define  COMN_REQ_BULK_SLICE_SHIFT		8
366#define   COMN_REQ_BULK_SLICE_REQUIRED		(1 << COMN_REQ_BULK_SLICE_SHIFT)
367#define COMN_REQ_STORAGE_SLICE			UINT16_C(0x0080)
368#define  COMN_REQ_STORAGE_SLICE_SHIFT		7
369#define   COMN_REQ_STORAGE_SLICE_REQUIRED	(1 << COMN_REQ_STORAGE_SLICE_SHIFT)
370#define COMN_REQ_RND_SLICE			UINT16_C(0x0040)
371#define  COMN_REQ_RND_SLICE_SHIFT		6
372#define   COMN_REQ_RND_SLICE_REQUIRED		(1 << COMN_REQ_RND_SLICE_SHIFT)
373#define COMN_REQ_PKE1_SLICE			UINT16_C(0x0020)
374#define  COMN_REQ_PKE1_SLICE_SHIFT		5
375#define   COMN_REQ_PKE1_SLICE_REQUIRED		(1 << COMN_REQ_PKE1_SLICE_SHIFT)
376#define COMN_REQ_PKE0_SLICE			UINT16_C(0x0010)
377#define  COMN_REQ_PKE0_SLICE_SHIFT		4
378#define   COMN_REQ_PKE0_SLICE_REQUIRED		(1 << COMN_REQ_PKE0_SLICE_SHIFT)
379#define COMN_REQ_AUTH1_SLICE			UINT16_C(0x0008)
380#define  COMN_REQ_AUTH1_SLICE_SHIFT		3
381#define   COMN_REQ_AUTH1_SLICE_REQUIRED		(1 << COMN_REQ_AUTH1_SLICE_SHIFT)
382#define COMN_REQ_AUTH0_SLICE			UINT16_C(0x0004)
383#define  COMN_REQ_AUTH0_SLICE_SHIFT		2
384#define   COMN_REQ_AUTH0_SLICE_REQUIRED		(1 << COMN_REQ_AUTH0_SLICE_SHIFT)
385#define COMN_REQ_CIPHER1_SLICE			UINT16_C(0x0002)
386#define  COMN_REQ_CIPHER1_SLICE_SHIFT		1
387#define   COMN_REQ_CIPHER1_SLICE_REQUIRED	(1 << COMN_REQ_CIPHER1_SLICE_SHIFT)
388#define COMN_REQ_CIPHER0_SLICE			UINT16_C(0x0001)
389#define  COMN_REQ_CIPHER0_SLICE_SHIFT		0
390#define   COMN_REQ_CIPHER0_SLICE_REQUIRED	(1 << COMN_REQ_CIPHER0_SLICE_SHIFT)
391
392#define COMN_REQ_CY0_ONLY(shram)			\
393		COMN_REQ_ORD_STRICT |			\
394		COMN_REQ_PTR_TYPE_FLAT |		\
395		(shram) |				\
396		COMN_REQ_RND_SLICE_REQUIRED | 		\
397		COMN_REQ_PKE0_SLICE_REQUIRED |		\
398		COMN_REQ_AUTH0_SLICE_REQUIRED |		\
399		COMN_REQ_CIPHER0_SLICE_REQUIRED;
400#define COMN_REQ_CY1_ONLY(shram)			\
401		COMN_REQ_ORD_STRICT |			\
402		COMN_REQ_PTR_TYPE_FLAT |		\
403		(shram) |				\
404		COMN_REQ_PKE1_SLICE_REQUIRED |		\
405		COMN_REQ_AUTH1_SLICE_REQUIRED |		\
406		COMN_REQ_CIPHER1_SLICE_REQUIRED;
407
408#define COMN_RESP_CRYPTO_STATUS		__BIT(7)
409#define COMN_RESP_PKE_STATUS		__BIT(6)
410#define COMN_RESP_CMP_STATUS		__BIT(5)
411#define COMN_RESP_XLAT_STATUS		__BIT(4)
412#define COMN_RESP_PM_STATUS		__BIT(3)
413#define COMN_RESP_INIT_ADMIN_STATUS	__BIT(2)
414
415#define COMN_STATUS_FLAG_OK		0
416#define COMN_STATUS_FLAG_ERROR		1
417
418struct fw_la_ssl_tls_common {
419	uint8_t out_len;	/* Number of bytes of key material to output. */
420	uint8_t label_len;	/* Number of bytes of label for SSL and bytes
421				 * for TLS key generation  */
422};
423
424struct fw_la_mgf_common {
425	uint8_t hash_len;
426	/* Number of bytes of hash output by the QAT per iteration */
427	uint8_t seed_len;
428	/* Number of bytes of seed provided in src buffer for MGF1 */
429};
430
431struct fw_cipher_hdr {
432	uint8_t state_sz;
433	/* State size in quad words of the cipher algorithm used in this session.
434	 * Set to zero if the algorithm doesnt provide any state */
435	uint8_t offset;
436	/* Quad word offset from the content descriptor parameters address i.e.
437	 * (content_address + (cd_hdr_sz << 3)) to the parameters for the cipher
438	 * processing */
439	uint8_t curr_id;
440	/* Initialised with the cipher slice type */
441	uint8_t next_id;
442	/* Set to the next slice to pass the ciphered data through.
443	 * Set to ICP_QAT_FW_SLICE_DRAM_WR if the data is not to go through
444	 * anymore slices after cipher */
445	uint16_t resrvd;
446	/* Reserved padding byte to bring the struct to the word boundary. MUST be
447	 * set to 0 */
448	uint8_t state_padding_sz;
449	/* State padding size in quad words. Set to 0 if no padding is required. */
450	uint8_t key_sz;
451	/* Key size in quad words of the cipher algorithm used in this session */
452};
453
454struct fw_auth_hdr {
455	uint8_t hash_flags;
456	/* General flags defining the processing to perform. 0 is normal processing
457	 * and 1 means there is a nested hash processing loop to go through */
458	uint8_t offset;
459	/* Quad word offset from the content descriptor parameters address to the
460	 * parameters for the auth processing */
461	uint8_t curr_id;
462	/* Initialised with the auth slice type */
463	uint8_t next_id;
464	/* Set to the next slice to pass data through.
465	 * Set to ICP_QAT_FW_SLICE_DRAM_WR if the data is not to go through
466	 * anymore slices after auth */
467	union {
468		uint8_t inner_prefix_sz;
469		/* Size in bytes of the inner prefix data */
470		uint8_t aad_sz;
471		/* Size in bytes of padded AAD data to prefix to the packet for CCM
472		 *  or GCM processing */
473	} u;
474
475	uint8_t outer_prefix_sz;
476	/* Size in bytes of outer prefix data */
477	uint8_t final_sz;
478	/* Size in bytes of digest to be returned to the client if requested */
479	uint8_t inner_res_sz;
480	/* Size in bytes of the digest from the inner hash algorithm */
481	uint8_t resrvd;
482	/* This field is unused, assumed value is zero. */
483	uint8_t inner_state1_sz;
484	/* Size in bytes of inner hash state1 data. Must be a qword multiple */
485	uint8_t inner_state2_off;
486	/* Quad word offset from the content descriptor parameters pointer to the
487	 * inner state2 value */
488	uint8_t inner_state2_sz;
489	/* Size in bytes of inner hash state2 data. Must be a qword multiple */
490	uint8_t outer_config_off;
491	/* Quad word offset from the content descriptor parameters pointer to the
492	 * outer configuration information */
493	uint8_t outer_state1_sz;
494	/* Size in bytes of the outer state1 value */
495	uint8_t outer_res_sz;
496	/* Size in bytes of digest from the outer auth algorithm */
497	uint8_t outer_prefix_off;
498	/* Quad word offset from the start of the inner prefix data to the outer
499	 * prefix information. Should equal the rounded inner prefix size, converted
500	 * to qwords  */
501};
502
503#define FW_AUTH_HDR_FLAG_DO_NESTED	1
504#define FW_AUTH_HDR_FLAG_NO_NESTED	0
505
506struct fw_la_comn_req {
507	union {
508		uint16_t la_flags;
509		/* Definition of the common LA processing flags used for the
510		 * bulk processing */
511		union {
512			struct fw_la_ssl_tls_common ssl_tls_common;
513			/* For TLS or SSL Key Generation, this field is
514			 * overloaded with ssl_tls common information */
515			struct fw_la_mgf_common mgf_common;
516			/* For MGF Key Generation, this field is overloaded with
517			   mgf information */
518		} u;
519	} u;
520
521	union {
522		uint8_t resrvd;
523		/* If not useRd by a request this field must be set to 0 */
524		uint8_t tls_seed_len;
525		/* Byte Len of tls seed */
526		uint8_t req_params_blk_sz;
527		/* For bulk processing this field represents the request
528		 * parameters block size */
529		uint8_t trng_cfg_sz;
530		/* This field is used for TRNG_ENABLE requests to indicate the
531		 * size of the TRNG Slice configuration word. Size is in QW's */
532	} u1;
533	uint8_t la_cmd_id;
534	/* Definition of the LA command defined by this request */
535};
536
537#define LA_FLAGS_GCM_IV_LEN_FLAG	__BIT(9)
538#define LA_FLAGS_PROTO			__BITS(8, 6)
539#define LA_FLAGS_PROTO_SNOW_3G		__SHIFTIN(4, LA_FLAGS_PROTO)
540#define LA_FLAGS_PROTO_GCM		__SHIFTIN(2, LA_FLAGS_PROTO)
541#define LA_FLAGS_PROTO_CCM		__SHIFTIN(1, LA_FLAGS_PROTO)
542#define LA_FLAGS_PROTO_NO		__SHIFTIN(0, LA_FLAGS_PROTO)
543#define LA_FLAGS_DIGEST_IN_BUFFER	__BIT(5)
544#define LA_FLAGS_CMP_AUTH_RES		__BIT(4)
545#define LA_FLAGS_RET_AUTH_RES		__BIT(3)
546#define LA_FLAGS_UPDATE_STATE		__BIT(2)
547#define LA_FLAGS_PARTIAL		__BITS(1, 0)
548
549struct fw_la_bulk_req {
550	struct fw_comn_req_hdr comn_hdr;
551	/* Common request header */
552	uint32_t flow_id;
553	/* Field used by Firmware to limit the number of stateful requests
554	 * for a session being processed at a given point of time */
555	struct fw_la_comn_req comn_la_req;
556	/* Common LA request parameters */
557	struct fw_comn_req_mid comn_mid;
558	/* Common request middle section */
559	uint64_t req_params_addr;
560	/* Memory address of the request parameters */
561	union fw_comn_req_ftr comn_ftr;
562	/* Common request footer */
563};
564
565struct fw_la_resp {
566	struct fw_comn_resp_hdr comn_resp;
567	uint8_t resrvd[64 - sizeof(struct fw_comn_resp_hdr)];
568	/* FW_RESP_DEFAULT_SZ_HW15 */
569};
570
571struct fw_la_cipher_req_params {
572	uint8_t resrvd;
573	/* Reserved field and assumed set to 0 */
574	uint8_t cipher_state_sz;
575	/* Number of quad words of state data for the cipher algorithm */
576	uint8_t curr_id;
577	/* Initialised with the cipher slice type */
578	uint8_t next_id;
579	/* Set to the next slice to pass the ciphered data through.
580	 * Set to ICP_QAT_FW_SLICE_DRAM_WR if the data is not to go through
581	 * anymore slices after cipher */
582	uint16_t resrvd1;
583	/* Reserved field, should be set to zero*/
584	uint8_t resrvd2;
585	/* Reserved field, should be set to zero*/
586	uint8_t next_offset;
587	/* Offset in bytes to the next request parameter block */
588	uint32_t cipher_off;
589	/* Byte offset from the start of packet to the cipher data region */
590	uint32_t cipher_len;
591	/* Byte length of the cipher data region */
592	uint64_t state_address;
593	/* Flat buffer address in memory of the cipher state information. Unused
594	 * if the state size is 0 */
595};
596
597struct fw_la_auth_req_params {
598	uint8_t auth_res_sz;
599	/* Size in quad words of digest information to validate */
600	uint8_t hash_state_sz;
601	/* Number of quad words of inner and outer hash prefix data to process */
602	uint8_t curr_id;
603	/* Initialised with the auth slice type */
604	uint8_t next_id;
605	/* Set to the next slice to pass the auth data through.
606	 * Set to ICP_QAT_FW_SLICE_NULL for in-place auth-only requests
607	 * Set to ICP_QAT_FW_SLICE_DRAM_WR for all other request types
608	 * if the data is not to go through anymore slices after auth */
609	union {
610		uint16_t resrvd;
611		/* Reserved field should be set to zero for bulk services */
612		uint16_t tls_secret_len;
613		/* Length of Secret information for TLS.   */
614	} u;
615	uint8_t resrvd;
616	/* Reserved field, should be set to zero*/
617	uint8_t next_offset;
618	/* offset in bytes to the next request parameter block */
619	uint32_t auth_off;
620	/* Byte offset from the start of packet to the auth data region */
621	uint32_t auth_len;
622	/* Byte length of the auth data region */
623	union {
624		uint64_t prefix_addr;
625		/* Address of the prefix information */
626		uint64_t aad_addr;
627		/* Address of the AAD info in DRAM. Used for the CCM and GCM
628		 * protocols */
629	} u1;
630	uint64_t auth_res_address;
631	/* Address of the auth result information to validate or the location to
632	 * writeback the digest information to */
633};
634
635#endif
636