Searched refs:SSE2 (Results 1 - 6 of 6) sorted by relevance

/freebsd-13-stable/sys/contrib/openzfs/lib/libspl/include/sys/
H A Dsimd.h60 SSE2, enumerator in enum:cpuid_inst_sets
112 [SSE2] = {1U, 0U, 1U << 26, EDX },
185 CPUID_FEATURE_CHECK(sse2, SSE2);
241 * Check if SSE2 instruction set is available
/freebsd-13-stable/contrib/llvm-project/clang/lib/Basic/Targets/
H A DX86.cpp109 // X86_64 always has SSE2.
321 .Case("+sse2", SSE2)
736 case SSE2:
757 case SSE2:
952 .Case("sse2", SSELevel >= SSE2)
1149 case 't': // Any SSE register, when SSE2 is enabled.
1150 case 'i': // Any SSE register, when SSE2 and inter-unit moves enabled.
1366 // 'Yi','Yt','Y2' are synonymous with 'x' when SSE2 is enabled.
1367 if (SSELevel < SSE2)
H A DX86.h48 SSE2, enumerator in enum:clang::targets::X86TargetInfo::X86SSEEnum
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86Subtarget.h64 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512F enumerator in enum:llvm::final::X86SSEEnum
79 /// SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, or none supported.
613 bool hasSSE2() const { return X86SSELevel >= SSE2; }
803 /// Use mfence if we have SSE2 or we're on x86-64 (even if we asked for
/freebsd-13-stable/sys/xen/interface/arch-x86/
H A Dcpufeatureset.h118 XEN_CPUFEATURE(SSE2, 0*32+26) /*A Streaming SIMD Extensions-2 */
/freebsd-13-stable/sys/contrib/libb2/
H A Dblake2-dispatch.c27 SSE2 = 1, enumerator in enum:__anon9634
109 feature = SSE2;

Completed in 141 milliseconds