Searched refs:SDHCI_CLOCK_CONTROL (Results 1 - 7 of 7) sorted by relevance
| /freebsd-13-stable/sys/dev/sdhci/ |
| H A D | sdhci_fsl_fdt.c | 176 val32 = RD4(sc, SDHCI_CLOCK_CONTROL);
179 WR4(sc, SDHCI_CLOCK_CONTROL, val32 & ~SDHCI_FSL_CLK_SDCLKEN);
210 WR4(sc, SDHCI_CLOCK_CONTROL, val32);
249 case SDHCI_CLOCK_CONTROL:
363 case SDHCI_CLOCK_CONTROL:
543 val = RD4(sc, SDHCI_CLOCK_CONTROL);
544 WR4(sc, SDHCI_CLOCK_CONTROL, val & ~SDHCI_FSL_CLK_SDCLKEN);
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| H A D | fsl_sdhci.c | 309 if (off == SDHCI_CLOCK_CONTROL) {
431 if (off == SDHCI_CLOCK_CONTROL) {
574 val32 = RD4(sc, SDHCI_CLOCK_CONTROL);
594 WR4(sc, SDHCI_CLOCK_CONTROL, val32 & ~SDHC_CLK_SDCLKEN);
647 WR4(sc, SDHCI_CLOCK_CONTROL, val32);
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| H A D | sdhci_xenon.c | 289 reg = bus_read_4(sc->mem_res, SDHCI_CLOCK_CONTROL);
291 bus_write_4(sc->mem_res, SDHCI_CLOCK_CONTROL, reg);
313 reg = bus_read_4(sc->mem_res, SDHCI_CLOCK_CONTROL);
315 bus_write_4(sc->mem_res, SDHCI_CLOCK_CONTROL, reg);
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| H A D | sdhci.c | 223 RD1(slot, SDHCI_WAKE_UP_CONTROL), RD2(slot, SDHCI_CLOCK_CONTROL));
354 clk = RD2(slot, SDHCI_CLOCK_CONTROL);
355 WR2(slot, SDHCI_CLOCK_CONTROL, clk & ~SDHCI_CLOCK_CARD_EN);
417 WR2(slot, SDHCI_CLOCK_CONTROL, clk);
420 WR2(slot, SDHCI_CLOCK_CONTROL, clk);
423 while (!((clk = RD2(slot, SDHCI_CLOCK_CONTROL))
436 WR2(slot, SDHCI_CLOCK_CONTROL, clk);
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| H A D | sdhci.h | 187 #define SDHCI_CLOCK_CONTROL 0x2C macro
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| /freebsd-13-stable/sys/arm/ti/ |
| H A D | ti_sdhci.c | 191 if (off == SDHCI_CLOCK_CONTROL) {
192 val32 = RD4(sc, SDHCI_CLOCK_CONTROL);
290 if (off == SDHCI_CLOCK_CONTROL) {
298 val32 = RD4(sc, SDHCI_CLOCK_CONTROL);
303 WR4(sc, SDHCI_CLOCK_CONTROL, val32);
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| /freebsd-13-stable/sys/arm/broadcom/bcm2835/ |
| H A D | bcm2835_sdhost.c | 888 case SDHCI_CLOCK_CONTROL:
893 dprintf("%s: SDHCI_CLOCK_CONTROL %04x --> %04x\n",
1117 case SDHCI_CLOCK_CONTROL:
1122 dprintf("%s: SDHCI_CLOCK_CONTROL %04x --> SCDIV %04x\n",
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