/freebsd-13-stable/crypto/openssl/crypto/bn/ |
H A D | rsaz_exp.h | 29 const BN_ULONG m_norm[16], const BN_ULONG RR[16], 36 const BN_ULONG RR[8]);
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H A D | bn_mont.c | 225 return bn_mul_mont_fixed_top(r, a, &(mont->RR), mont, ctx); 245 bn_init(&ctx->RR); 256 BN_clear_free(&mont->RR); 274 R = &(mont->RR); /* grab RR as a temp */ 393 /* setup RR for conversions */ 394 BN_zero(&(mont->RR)); 395 if (!BN_set_bit(&(mont->RR), mont->ri * 2)) 397 if (!BN_mod(&(mont->RR), &(mont->RR), [all...] |
H A D | rsaz_exp.c | 59 const BN_ULONG m_norm[16], const BN_ULONG RR[16], 82 rsaz_1024_norm2red_avx2(R2, RR); 260 const BN_ULONG m[8], BN_ULONG k0, const BN_ULONG RR[8]) 282 rsaz_512_mul(a_inv, base, RR, m, k0);
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/CodeGen/ |
H A D | RDFRegisters.cpp | 97 RegisterRef PhysicalRegisterInfo::normalize(RegisterRef RR) const { 98 return RR; 102 // Do not include RR in the alias set. 162 bool PhysicalRegisterInfo::aliasRM(RegisterRef RR, RegisterRef RM) const { argument 163 assert(Register::isPhysicalRegister(RR.Reg) && isRegMaskId(RM.Reg)); 165 bool Preserved = MB[RR.Reg/32] & (1u << (RR.Reg%32)); 169 if (RR.Mask == LaneBitmask::getAll()) 171 const TargetRegisterClass *RC = RegInfos[RR.Reg].RegClass; 172 if (RC != nullptr && (RR 225 mapTo(RegisterRef RR, unsigned R) const argument 268 insert(RegisterRef RR) argument 287 intersect(RegisterRef RR) argument 296 clear(RegisterRef RR) argument [all...] |
H A D | RegisterClassInfo.cpp | 72 const BitVector &RR = MF->getRegInfo().getReservedRegs(); local 73 if (Reserved.size() != RR.size() || RR != Reserved) { 75 Reserved = RR;
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H A D | RDFGraph.cpp | 418 void RefNode::setRegRef(RegisterRef RR, DataFlowGraph &G) { argument 421 Ref.PR = G.pack(RR); 596 // For a given instruction, check if there are any bits of RR that can remain 603 // Check if the definition of RR produces an unspecified value. 816 RegisterRef RR, NodeAddr<BlockNode*> PredB, uint16_t Flags) { 819 PUA.Addr->setRegRef(RR, *this); 832 RegisterRef RR, uint16_t Flags) { 835 DA.Addr->setRegRef(RR, *this); 909 RegisterRef RR = *I; local 912 NodeAddr<DefNode*> DA = newDef(PA, RR, PhiFlag 815 newPhiUse(NodeAddr<PhiNode*> Owner, RegisterRef RR, NodeAddr<BlockNode*> PredB, uint16_t Flags) argument 831 newDef(NodeAddr<InstrNode*> Owner, RegisterRef RR, uint16_t Flags) argument 1056 RegisterRef RR = PDA.Addr->getRegRef(*this); local 1102 RegisterRef RR = PDA.Addr->getRegRef(*this); local 1182 RegisterRef RR = RA.Addr->getRegRef(*this); local 1344 RegisterRef RR = makeRegRef(Op); local 1492 RegisterRef RR = MaxRefs[ClosureIdx[X]]; local 1500 RegisterRef RR = MaxRefs[ClosureIdx[X]]; local 1623 RegisterRef RR = RA.Addr->getRegRef(*this); local 1712 RegisterRef RR = PUA.Addr->getRegRef(*this); local [all...] |
H A D | RDFLiveness.cpp | 145 RegisterRef RR = TA.Addr->getRegRef(DFG); local 147 if (RegisterAggr::isCoverOf(RR, RefRR, PRI)) 672 RegisterRef RR = NodeAddr<DefNode*>(Ds[0]).Addr->getRegRef(DFG); local 673 dbgs() << '<' << Print<RegisterRef>(RR, DFG) << '>'; 1076 RegisterRef RR = PRI.normalize(UA.Addr->getRegRef(DFG)); local 1079 LiveIn[RR.Reg].insert({D.Id,RR.Mask});
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/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | RDFRegisters.h | 83 bool operator== (const RegisterRef &RR) const { 84 return Reg == RR.Reg && Mask == RR.Mask; 87 bool operator!= (const RegisterRef &RR) const { 88 return !operator==(RR); 91 bool operator< (const RegisterRef &RR) const { 92 return Reg < RR.Reg || (Reg == RR.Reg && Mask < RR.Mask); 113 RegisterRef normalize(RegisterRef RR) cons [all...] |
H A D | RDFGraph.h | 525 void setRegRef(RegisterRef RR, DataFlowGraph &G); 553 NodeAddr<RefNode*> getNextRef(RegisterRef RR, Predicate P, bool NextOnly, 740 PackedRegisterRef pack(RegisterRef RR) { argument 741 return { RR.Reg, LMI.getIndexForLaneMask(RR.Mask) }; 743 PackedRegisterRef pack(RegisterRef RR) const { 744 return { RR.Reg, LMI.getIndexForLaneMask(RR.Mask) }; 827 RegisterRef RR, NodeAddr<BlockNode*> PredB, 832 RegisterRef RR, uint16_ 887 getNextRef(RegisterRef RR, Predicate P, bool NextOnly, const DataFlowGraph &G) argument [all...] |
/freebsd-13-stable/contrib/llvm-project/clang/lib/StaticAnalyzer/Checkers/ |
H A D | PointerSubChecker.cpp | 45 const MemRegion *RR = RV.getAsRegion(); local 47 if (!(LR && RR)) 51 const MemRegion *BaseRR = RR->getBaseRegion();
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/freebsd-13-stable/contrib/llvm-project/llvm/lib/MCA/HardwareUnits/ |
H A D | ResourceManager.cpp | 194 void ResourceManager::use(const ResourceRef &RR) { argument 195 // Mark the sub-resource referenced by RR as used. 196 unsigned RSID = getResourceStateIndex(RR.first); 198 RS.markSubResourceAsUsed(RR.second); 202 Strategies[RSID]->used(RR.second); 204 // If there are still available units in RR.first, 209 AvailableProcResUnits ^= RR.first; 211 // Notify groups that RR.first is no longer available. 217 CurrentUser.markSubResourceAsUsed(RR.first); 218 Strategies[GroupIndex]->used(RR 224 release(const ResourceRef &RR) argument 330 const ResourceRef &RR = BR.first; local [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonExpandCondsets.cpp | 182 bool operator== (RegisterRef RR) const { 183 return Reg == RR.Reg && Sub == RR.Sub; 185 bool operator!= (RegisterRef RR) const { return !operator==(RR); } 186 bool operator< (RegisterRef RR) const { 187 return Reg < RR.Reg || (Reg == RR.Reg && Sub < RR.Sub); 201 void addRefToMap(RegisterRef RR, ReferenceMa 294 addRefToMap(RegisterRef RR, ReferenceMap &Map, unsigned Exec) argument 304 isRefInMap(RegisterRef RR, ReferenceMap &Map, unsigned Exec) argument 768 RegisterRef RR = Op; local 802 RegisterRef RR = Op; local 1002 RegisterRef RR = Op; local 1094 isIntReg(RegisterRef RR, unsigned &BW) argument [all...] |
H A D | RDFCopy.cpp | 121 auto MinPhysReg = [this] (RegisterRef RR) -> unsigned { 123 const TargetRegisterClass &RC = *TRI.getMinimalPhysRegClass(RR.Reg); 124 if ((RC.LaneMask & RR.Mask) == RC.LaneMask) 125 return RR.Reg; 126 for (MCSubRegIndexIterator S(RR.Reg, &TRI); S.isValid(); ++S) 127 if (RR.Mask == TRI.getSubRegIndexLaneMask(S.getSubRegIndex()))
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H A D | BitTracker.cpp | 329 uint16_t BT::MachineEvaluator::getRegBitWidth(const RegisterRef &RR) const { 335 // 1. find a physical register PhysR from the same class as RR.Reg, 336 // 2. find a physical register PhysS that corresponds to PhysR:RR.Sub, 338 if (Register::isVirtualRegister(RR.Reg)) { 339 const auto &VC = composeWithSubRegIndex(*MRI.getRegClass(RR.Reg), RR.Sub); 342 assert(Register::isPhysicalRegister(RR.Reg)); 344 (RR.Sub == 0) ? Register(RR.Reg) : TRI.getSubReg(RR [all...] |
H A D | BitTracker.h | 53 RegisterCell get(RegisterRef RR) const; 54 void put(RegisterRef RR, const RegisterCell &RC); 396 uint16_t getRegBitWidth(const RegisterRef &RR) const; 398 RegisterCell getCell(const RegisterRef &RR, const CellMapType &M) const; 399 void putCell(const RegisterRef &RR, RegisterCell RC, CellMapType &M) const; 404 RegisterCell getRef(const RegisterRef &RR, const CellMapType &M) const { 405 RegisterCell RC = getCell(RR, M);
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H A D | HexagonOptAddrMode.cpp | 170 RegisterRef RR = UA.Addr->getRegRef(*DFG); local 171 if (OffsetReg == RR.Reg) { 172 OffsetRR = RR; 292 RegisterRef RR = UA.Addr->getRegRef(*DFG); local 293 if (LRExtReg == RR.Reg) { 294 LRExtRR = RR;
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H A D | HexagonBitSimplify.cpp | 211 static bool getSubregMask(const BitTracker::RegisterRef &RR, 227 const BitTracker::RegisterRef &RR, MachineRegisterInfo &MRI); 405 bool HexagonBitSimplify::getSubregMask(const BitTracker::RegisterRef &RR, 407 const TargetRegisterClass *RC = MRI.getRegClass(RR.Reg); 408 if (RR.Sub == 0) { 420 if (RR.Sub == Hexagon::isub_hi || RR.Sub == Hexagon::vsub_hi) 896 const BitTracker::RegisterRef &RR, MachineRegisterInfo &MRI) { 897 if (!Register::isVirtualRegister(RR.Reg)) 899 auto *RC = MRI.getRegClass(RR [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/lib/MCA/Stages/ |
H A D | ExecuteStage.cpp | 103 for (const ResourceRef &RR : Freed) 104 notifyResourceAvailable(RR); 245 void ExecuteStage::notifyResourceAvailable(const ResourceRef &RR) const { 246 LLVM_DEBUG(dbgs() << "[E] Resource Available: [" << RR.first << '.' 247 << RR.second << "]\n"); 249 Listener->onResourceAvailable(RR);
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/freebsd-13-stable/sys/arm/broadcom/bcm2835/ |
H A D | bcm2835_pwm.c | 365 #define RR(x,y) \ macro 371 RR(24, "DAT2") 372 RR(20, "RNG2") 373 RR(18, "FIF1") 374 RR(14, "DAT1") 375 RR(10, "RNG1") 376 RR(08, "DMAC") 377 RR(04, "STA") 378 RR(00, "CTL") 379 #undef RR macro [all...] |
/freebsd-13-stable/contrib/llvm-project/llvm/tools/llvm-mca/Views/ |
H A D | ResourcePressureView.cpp | 58 const ResourceRef &RR = Use.first; local 59 assert(Resource2VecIndex.find(RR.first) != Resource2VecIndex.end()); 60 unsigned R2VIndex = Resource2VecIndex[RR.first]; 61 R2VIndex += countTrailingZeros(RR.second);
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H A D | BottleneckAnalysis.cpp | 73 const ResourceRef &RR = Use.first; local 74 unsigned Index = ProcResID2ResourceUsersIndex[RR.first]; 75 Index += countTrailingZeros(RR.second);
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/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/MCA/Stages/ |
H A D | ExecuteStage.h | 81 void notifyResourceAvailable(const ResourceRef &RR) const;
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/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/MCA/HardwareUnits/ |
H A D | ResourceManager.h | 375 void use(const ResourceRef &RR); 376 void release(const ResourceRef &RR);
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/freebsd-13-stable/crypto/openssl/crypto/ |
H A D | ppccap.c | 142 static const unsigned long RR[] = { 0x0000000000000003U, local 147 ecp_nistz256_mul_mont(res, in, RR);
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/freebsd-13-stable/contrib/llvm-project/llvm/include/llvm/ADT/ |
H A D | ImmutableSet.h | 524 TreeTy *RR = getRight(R); local 526 if (getHeight(RR) >= getHeight(RL)) 527 return createNode(createNode(L,V,RL), R, RR); 534 return createNode(createNode(L,V,RLL), RL, createNode(RLR,R,RR));
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