Searched refs:RISCVSubtarget (Results 1 - 21 of 21) sorted by relevance

/freebsd-13-stable/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVLegalizerInfo.h20 class RISCVSubtarget;
25 RISCVLegalizerInfo(const RISCVSubtarget &ST);
H A DRISCVLegalizerInfo.cpp21 RISCVLegalizerInfo::RISCVLegalizerInfo(const RISCVSubtarget &ST) {
H A DRISCVSubtarget.cpp1 //===-- RISCVSubtarget.cpp - RISCV Subtarget Information ------------------===//
13 #include "RISCVSubtarget.h"
30 void RISCVSubtarget::anchor() {}
32 RISCVSubtarget &RISCVSubtarget::initializeSubtargetDependencies(
50 RISCVSubtarget::RISCVSubtarget(const Triple &TT, StringRef CPU, StringRef FS, function in class:RISCVSubtarget
65 const CallLowering *RISCVSubtarget::getCallLowering() const {
69 InstructionSelector *RISCVSubtarget::getInstructionSelector() const {
73 const LegalizerInfo *RISCVSubtarget
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H A DRISCVInstructionSelector.cpp15 #include "RISCVSubtarget.h"
35 const RISCVSubtarget &STI,
44 const RISCVSubtarget &STI;
52 const RISCVSubtarget *Subtarget = &STI;
70 const RISCVTargetMachine &TM, const RISCVSubtarget &STI,
100 RISCVSubtarget &Subtarget,
H A DRISCVTargetMachine.h17 #include "RISCVSubtarget.h"
25 mutable StringMap<std::unique_ptr<RISCVSubtarget>> SubtargetMap;
33 const RISCVSubtarget *getSubtargetImpl(const Function &F) const override;
37 const RISCVSubtarget *getSubtargetImpl() const = delete;
H A DRISCV.h22 class RISCVSubtarget;
50 RISCVSubtarget &,
H A DRISCVTargetTransformInfo.h19 #include "RISCVSubtarget.h"
33 const RISCVSubtarget *ST;
36 const RISCVSubtarget *getST() const { return ST; }
H A DRISCVFrameLowering.h19 class RISCVSubtarget;
23 explicit RISCVFrameLowering(const RISCVSubtarget &STI)
68 const RISCVSubtarget &STI;
H A DRISCVMachineFunctionInfo.h16 #include "RISCVSubtarget.h"
58 return MF.getSubtarget<RISCVSubtarget>().enableSaveRestore() &&
H A DRISCVISelDAGToDAG.h24 const RISCVSubtarget *Subtarget = nullptr;
35 Subtarget = &MF.getSubtarget<RISCVSubtarget>();
H A DRISCVSubtarget.h1 //===-- RISCVSubtarget.h - Define Subtarget for the RISCV -------*- C++ -*-===//
35 class RISCVSubtarget : public RISCVGenSubtargetInfo { class in namespace:llvm
71 RISCVSubtarget &initializeSubtargetDependencies(const Triple &TT,
77 RISCVSubtarget(const Triple &TT, StringRef CPU, StringRef FS,
H A DRISCVRegisterInfo.cpp16 #include "RISCVSubtarget.h"
47 auto &Subtarget = MF->getSubtarget<RISCVSubtarget>();
77 if (MF.getSubtarget<RISCVSubtarget>().isRegisterReservedByUser(Reg))
98 return !MF.getSubtarget<RISCVSubtarget>().isRegisterReservedByUser(PhysReg);
150 const RISCVInstrInfo *TII = MF.getSubtarget<RISCVSubtarget>().getInstrInfo();
194 auto &Subtarget = MF.getSubtarget<RISCVSubtarget>();
H A DRISCVInstrInfo.h24 class RISCVSubtarget;
29 explicit RISCVInstrInfo(RISCVSubtarget &STI);
134 const RISCVSubtarget &STI;
H A DRISCVTargetMachine.cpp75 const RISCVSubtarget *
103 I = std::make_unique<RISCVSubtarget>(TargetTriple, CPU, FS, ABIName, *this);
H A DRISCVISelLowering.h22 class RISCVSubtarget;
59 const RISCVSubtarget &Subtarget;
63 const RISCVSubtarget &STI);
H A DRISCVExpandPseudoInsts.cpp163 const auto &STI = MF->getSubtarget<RISCVSubtarget>();
178 const auto &STI = MF->getSubtarget<RISCVSubtarget>();
H A DRISCVAsmPrinter.cpp201 const RISCVSubtarget STI(TT, CPU, FS, /*ABIName=*/"", RTM);
H A DRISCVFrameLowering.cpp15 #include "RISCVSubtarget.h"
197 static Register getFPReg(const RISCVSubtarget &STI) { return RISCV::X8; }
200 static Register getSPReg(const RISCVSubtarget &STI) { return RISCV::X2; }
550 if (MF.getSubtarget<RISCVSubtarget>().hasStdExtD() ||
551 MF.getSubtarget<RISCVSubtarget>().hasStdExtF()) {
H A DRISCVInstrInfo.cpp15 #include "RISCVSubtarget.h"
35 RISCVInstrInfo::RISCVInstrInfo(RISCVSubtarget &STI)
170 bool IsRV64 = MF->getSubtarget<RISCVSubtarget>().is64Bit();
460 const RISCVSubtarget &ST = MF->getSubtarget<RISCVSubtarget>();
H A DRISCVISelLowering.cpp18 #include "RISCVSubtarget.h"
46 const RISCVSubtarget &STI)
1732 RISCVABI::ABI ABI = MF.getSubtarget<RISCVSubtarget>().getTargetABI();
1753 RISCVABI::ABI ABI = MF.getSubtarget<RISCVSubtarget>().getTargetABI();
2357 MF.getSubtarget<RISCVSubtarget>().isRegisterReservedByUser(RISCV::X1))
2464 RISCVABI::ABI ABI = MF.getSubtarget<RISCVSubtarget>().getTargetABI();
2479 const RISCVSubtarget &STI = MF.getSubtarget<RISCVSubtarget>();
2575 const RISCVSubtarget &STI = MF.getSubtarget<RISCVSubtarget>();
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/freebsd-13-stable/lib/clang/libllvm/
H A DMakefile1287 SRCS_MIN+= Target/RISCV/RISCVSubtarget.cpp

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